Add a TargetIsa::allocatable_registers() method.

This gives the target ISA a chance to reserve registers like the stack
pointer or hard-wired 0 registers like %x0 on RISC-V.

lib/cretonne/src/isa/intel/mod.rs

@@ -12,6 +12,7 @@ use isa::enc_tables::{self as shared_enc_tables, lookup_enclist, general_encodin
 use isa::Builder as IsaBuilder;
 use isa::{TargetIsa, RegInfo, RegClass, EncInfo, Encoding, Legalize};
 use ir;
+use regalloc;
 
 #[allow(dead_code)]
 struct Isa {
@@ -86,6 +87,10 @@ impl TargetIsa for Isa {
         abi::regclass_for_abi_type(ty)
     }
 
+    fn allocatable_registers(&self, func: &ir::Function) -> regalloc::AllocatableSet {
+        abi::allocatable_registers(func)
+    }
+
     fn emit_inst(&self, func: &ir::Function, inst: ir::Inst, sink: &mut CodeSink) {
         binemit::emit_inst(func, inst, sink)
     }