Add raw_bitcast instruction
Casts bits as a different type of the same width with no change to the data (unlike bitcast)
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@@ -9,7 +9,6 @@ use crate::cdsl::instructions::{
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};
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use crate::cdsl::recipes::{EncodingRecipe, EncodingRecipeNumber, Recipes};
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use crate::cdsl::settings::{SettingGroup, SettingPredicateNumber};
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use crate::cdsl::types::ValueType;
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use crate::shared::types::Bool::{B1, B16, B32, B64, B8};
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use crate::shared::types::Float::{F32, F64};
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@@ -333,6 +332,7 @@ pub fn define(
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let load_complex = shared.by_name("load_complex");
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let nearest = shared.by_name("nearest");
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let popcnt = shared.by_name("popcnt");
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let raw_bitcast = shared.by_name("raw_bitcast");
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let regfill = shared.by_name("regfill");
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let regmove = shared.by_name("regmove");
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let regspill = shared.by_name("regspill");
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@@ -452,6 +452,7 @@ pub fn define(
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let rec_ldWithIndexDisp8 = r.template("ldWithIndexDisp8");
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let rec_mulx = r.template("mulx");
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let rec_null = r.recipe("null");
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let rec_null_fpr = r.recipe("null_fpr");
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let rec_pcrel_fnaddr8 = r.template("pcrel_fnaddr8");
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let rec_pcrel_gvaddr8 = r.template("pcrel_gvaddr8");
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let rec_popq = r.template("popq");
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@@ -1588,5 +1589,17 @@ pub fn define(
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e.enc_x86_64_isap(instruction, template, use_sse2);
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}
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// SIMD bitcast all 128-bit vectors to each other (for legalizing splat.x16x8)
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for from_type in ValueType::all_lane_types().filter(|t| t.lane_bits() >= 8) {
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for to_type in ValueType::all_lane_types().filter(|t| t.lane_bits() >= 8 && *t != from_type)
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{
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let instruction = raw_bitcast
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.bind_vector(to_type, 128 / to_type.lane_bits())
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.bind_vector(from_type, 128 / from_type.lane_bits());
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e.enc32_rec(instruction.clone(), rec_null_fpr, 0);
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e.enc64_rec(instruction, rec_null_fpr, 0);
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}
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}
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e
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}
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