Multi-value return support.

cranelift/codegen/src/machinst/lower.rs

@@ -6,6 +6,7 @@ use crate::entity::SecondaryMap;
 use crate::fx::{FxHashMap, FxHashSet};
 use crate::inst_predicates::{has_side_effect_or_load, is_constant_64bit};
 use crate::ir::instructions::BranchInfo;
+use crate::ir::types::I64;
 use crate::ir::{
     ArgumentExtension, Block, Constant, ConstantData, ExternalName, Function, GlobalValueData,
     Inst, InstructionData, MemFlags, Opcode, Signature, SourceLoc, Type, Value, ValueDef,
@@ -382,6 +383,9 @@ impl<'func, I: VCodeInst> Lower<'func, I> {
                 let insn = self.vcode.abi().gen_copy_arg_to_reg(i, reg);
                 self.emit(insn);
             }
+            for insn in self.vcode.abi().gen_retval_area_setup().into_iter() {
+                self.emit(insn);
+            }
         }
     }
 
@@ -648,6 +652,12 @@ impl<'func, I: VCodeInst> Lower<'func, I> {
     pub fn lower<B: LowerBackend<MInst = I>>(mut self, backend: &B) -> CodegenResult<VCode<I>> {
         debug!("about to lower function: {:?}", self.f);
 
+        // Initialize the ABI object with any temps it needs.
+        let tmps: SmallVec<[Writable<Reg>; 4]> = (0..self.vcode.abi().needed_tmps())
+            .map(|_| self.alloc_tmp(RegClass::I64, I64))
+            .collect();
+        self.vcode.abi().init_with_tmps(&tmps[..]);
+
         // Get the pinned reg here (we only parameterize this function on `B`,
         // not the whole `Lower` impl).
         self.pinned_reg = backend.maybe_pinned_reg();