From 606ae9b4d1230ca641d316cb4cd073b460313456 Mon Sep 17 00:00:00 2001 From: T0b1 Date: Fri, 14 Apr 2023 18:46:16 +0200 Subject: [PATCH] custom changes --- cranelift/codegen/Cargo.toml | 2 +- cranelift/codegen/src/isa/aarch64/inst/regs.rs | 1 + cranelift/codegen/src/isa/riscv64/inst/regs.rs | 1 + cranelift/codegen/src/isa/s390x/inst/regs.rs | 1 + cranelift/codegen/src/isa/x64/inst/regs.rs | 1 + cranelift/codegen/src/machinst/compile.rs | 1 + cranelift/codegen/src/machinst/vcode.rs | 16 ++++++++-------- cranelift/filetests/src/function_runner.rs | 11 +++++++++++ 8 files changed, 25 insertions(+), 9 deletions(-) diff --git a/cranelift/codegen/Cargo.toml b/cranelift/codegen/Cargo.toml index b22ec38bf5..9510933ec1 100644 --- a/cranelift/codegen/Cargo.toml +++ b/cranelift/codegen/Cargo.toml @@ -27,7 +27,7 @@ serde = { version = "1.0.94", features = ["derive"], optional = true } bincode = { version = "1.2.1", optional = true } gimli = { workspace = true, features = ["write"], optional = true } smallvec = { workspace = true } -regalloc2 = { version = "0.6.1", features = ["checker"] } +regalloc2 = { path = "../../../regalloc2/", features = ["checker", "trace-log"] } souper-ir = { version = "2.1.0", optional = true } sha2 = { version = "0.10.2", optional = true } # It is a goal of the cranelift-codegen crate to have minimal external dependencies. diff --git a/cranelift/codegen/src/isa/aarch64/inst/regs.rs b/cranelift/codegen/src/isa/aarch64/inst/regs.rs index 7cfe46d74f..08a276abb2 100644 --- a/cranelift/codegen/src/isa/aarch64/inst/regs.rs +++ b/cranelift/codegen/src/isa/aarch64/inst/regs.rs @@ -230,6 +230,7 @@ pub fn create_reg_env(flags: &settings::Flags) -> MachineEnv { ], ], fixed_stack_slots: vec![], + scratch_by_class: [None, None], }; if !flags.enable_pinned_reg() { diff --git a/cranelift/codegen/src/isa/riscv64/inst/regs.rs b/cranelift/codegen/src/isa/riscv64/inst/regs.rs index 35cef328c2..d224bc9603 100644 --- a/cranelift/codegen/src/isa/riscv64/inst/regs.rs +++ b/cranelift/codegen/src/isa/riscv64/inst/regs.rs @@ -182,6 +182,7 @@ pub fn crate_reg_eviroment(_flags: &settings::Flags) -> MachineEnv { preferred_regs_by_class, non_preferred_regs_by_class, fixed_stack_slots: vec![], + scratch_by_class: [None, None], } } diff --git a/cranelift/codegen/src/isa/s390x/inst/regs.rs b/cranelift/codegen/src/isa/s390x/inst/regs.rs index a5736c6655..678f83c312 100644 --- a/cranelift/codegen/src/isa/s390x/inst/regs.rs +++ b/cranelift/codegen/src/isa/s390x/inst/regs.rs @@ -151,6 +151,7 @@ pub fn create_machine_env(_flags: &settings::Flags) -> MachineEnv { ], ], fixed_stack_slots: vec![], + scratch_by_class: [None, None], } } diff --git a/cranelift/codegen/src/isa/x64/inst/regs.rs b/cranelift/codegen/src/isa/x64/inst/regs.rs index 8d46096444..4b3bd54c22 100644 --- a/cranelift/codegen/src/isa/x64/inst/regs.rs +++ b/cranelift/codegen/src/isa/x64/inst/regs.rs @@ -203,6 +203,7 @@ pub(crate) fn create_reg_env_systemv(flags: &settings::Flags) -> MachineEnv { vec![], ], fixed_stack_slots: vec![], + scratch_by_class: [None, None] }; debug_assert_eq!(r15(), pinned_reg()); diff --git a/cranelift/codegen/src/machinst/compile.rs b/cranelift/codegen/src/machinst/compile.rs index 254b4ec557..4bc6375549 100644 --- a/cranelift/codegen/src/machinst/compile.rs +++ b/cranelift/codegen/src/machinst/compile.rs @@ -51,6 +51,7 @@ pub fn compile( let _tt = timing::regalloc(); let mut options = RegallocOptions::default(); options.verbose_log = b.flags().regalloc_verbose_logs(); + options.fast_alloc = true; if cfg!(debug_assertions) { options.validate_ssa = true; diff --git a/cranelift/codegen/src/machinst/vcode.rs b/cranelift/codegen/src/machinst/vcode.rs index 4cfa3b8c59..840b4e1dbf 100644 --- a/cranelift/codegen/src/machinst/vcode.rs +++ b/cranelift/codegen/src/machinst/vcode.rs @@ -908,6 +908,7 @@ impl VCode { for inst_or_edit in regalloc.block_insts_and_edits(&self, block) { match inst_or_edit { InstOrEdit::Inst(iix) => { + trace!("Emitting inst {}", iix.index()); if !self.debug_value_labels.is_empty() { // If we need to produce debug info, // record the offset of each instruction @@ -1009,6 +1010,7 @@ impl VCode { // immediately emit it. match (from.as_reg(), to.as_reg()) { (Some(from), Some(to)) => { + trace!("Emitting move from {} to {}", from, to); // Reg-to-reg move. let from_rreg = Reg::from(from); let to_rreg = Writable::from_reg(Reg::from(to)); @@ -1018,6 +1020,7 @@ impl VCode { do_emit(&mv, &[], &mut disasm, &mut buffer, &mut state); } (Some(from), None) => { + trace!("Emitting move from {} to slot {}", from, to.as_stack().unwrap().index()); // Spill from register to spillslot. let to = to.as_stack().unwrap(); let from_rreg = RealReg::from(from); @@ -1025,6 +1028,7 @@ impl VCode { do_emit(&spill, &[], &mut disasm, &mut buffer, &mut state); } (None, Some(to)) => { + trace!("Emitting move from slot {} to {}", from.as_stack().unwrap().index(), to); // Load from spillslot to register. let from = from.as_stack().unwrap(); let to_rreg = Writable::from_reg(RealReg::from(to)); @@ -1100,6 +1104,10 @@ impl VCode { self.compute_value_labels_ranges(regalloc, &inst_offsets[..], func_body_len); let frame_size = self.abi.frame_size(); + if want_disasm { + trace!("Disassembly:\n{}", disasm); + } + EmitResult { buffer, bb_offsets, @@ -1282,14 +1290,6 @@ impl RegallocFunction for VCode { self.insts[insn.index()].is_safepoint() } - fn is_move(&self, insn: InsnIndex) -> Option<(Operand, Operand)> { - let (a, b) = self.is_move.get(&insn)?; - Some(( - self.assert_operand_not_vreg_alias(*a), - self.assert_operand_not_vreg_alias(*b), - )) - } - fn inst_operands(&self, insn: InsnIndex) -> &[Operand] { let (start, end) = self.operand_ranges[insn.index()]; let ret = &self.operands[start as usize..end as usize]; diff --git a/cranelift/filetests/src/function_runner.rs b/cranelift/filetests/src/function_runner.rs index a786506439..342d24c774 100644 --- a/cranelift/filetests/src/function_runner.rs +++ b/cranelift/filetests/src/function_runner.rs @@ -17,6 +17,7 @@ use std::cmp::max; use std::collections::hash_map::Entry; use std::collections::HashMap; use thiserror::Error; +use log::trace; const TESTFILE_NAMESPACE: u32 = 0; @@ -191,6 +192,7 @@ impl TestFileCompiler { // First, rename the function let func_original_name = func.name; func.name = UserFuncName::User(defined_func.new_name.clone()); + trace!("Rename func from '{}' to '{}'", func_original_name, func.name); // Rename any functions that it references // Do this in stages to appease the borrow checker @@ -233,6 +235,10 @@ impl TestFileCompiler { .get(&func.name) .ok_or(anyhow!("Undeclared function {} found!", &func.name))?; + if log::log_enabled!(log::Level::Trace) { + self.ctx.set_disasm(true); + } + self.ctx.func = self.apply_func_rename(func, defined_func)?; self.module.define_function_with_control_plane( defined_func.func_id, @@ -277,6 +283,11 @@ impl TestFileCompiler { // available). self.module.finalize_definitions()?; + for (name, func) in self.defined_functions.iter() { + let ptr = self.module.get_finalized_function(func.func_id); + trace!("Function '{}' at {:#X}", name, ptr as u64); + } + Ok(CompiledTestFile { module: Some(self.module), defined_functions: self.defined_functions,