Remove the vconst instruction and the UnaryImmVector format.
No instruction sets actually have single instructions for materializing vector constants. You always need to use a constant pool. Cretonne doesn't have constant pools yet, but it will in the future, and that is how vector constants should be represented.
This commit is contained in:
@@ -643,7 +643,6 @@ Constant materialization
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.. autoinst:: iconst
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.. autoinst:: f32const
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.. autoinst:: f64const
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.. autoinst:: vconst
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Live range splitting
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--------------------
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@@ -8,7 +8,7 @@ in this module.
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from __future__ import absolute_import
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from cdsl.formats import InstructionFormat
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from cdsl.operands import VALUE, VARIABLE_ARGS
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from .immediates import imm64, uimm8, ieee32, ieee64, immvector, intcc, floatcc
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from .immediates import imm64, uimm8, ieee32, ieee64, intcc, floatcc
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from .entities import ebb, sig_ref, func_ref, jump_table
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Nullary = InstructionFormat()
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@@ -17,7 +17,6 @@ Unary = InstructionFormat(VALUE)
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UnaryImm = InstructionFormat(imm64)
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UnaryIeee32 = InstructionFormat(ieee32)
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UnaryIeee64 = InstructionFormat(ieee64)
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UnaryImmVector = InstructionFormat(immvector, boxed_storage=True)
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UnarySplit = InstructionFormat(VALUE, multiple_results=True)
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Binary = InstructionFormat(VALUE, VALUE)
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@@ -27,12 +27,6 @@ ieee32 = ImmediateKind('ieee32', 'A 32-bit immediate floating point number.')
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#: IEEE 754-2008 binary64 interchange format.
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ieee64 = ImmediateKind('ieee64', 'A 64-bit immediate floating point number.')
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#: A large SIMD vector constant.
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immvector = ImmediateKind(
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'immvector',
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'An immediate SIMD vector.',
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rust_type='ImmVector')
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#: A condition code for comparing integer values.
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#:
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#: This enumerated operand kind is used for the :cton:inst:`icmp` instruction
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@@ -9,7 +9,7 @@ from cdsl.operands import Operand, VARIABLE_ARGS
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from cdsl.typevar import TypeVar
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from cdsl.instructions import Instruction, InstructionGroup
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from base.types import i8, f32, f64, b1
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from base.immediates import imm64, uimm8, ieee32, ieee64, immvector
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from base.immediates import imm64, uimm8, ieee32, ieee64
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from base.immediates import intcc, floatcc
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from base import entities
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import base.formats # noqa
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@@ -196,16 +196,6 @@ f64const = Instruction(
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""",
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ins=N, outs=a)
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N = Operand('N', immvector)
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a = Operand('a', TxN, doc='A constant vector value')
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vconst = Instruction(
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'vconst', r"""
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Vector constant (floating point or integer).
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Create a SIMD vector value where the lanes don't have to be identical.
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""",
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ins=N, outs=a)
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#
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# Generics.
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#
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@@ -6,7 +6,7 @@
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use ir::{types, instructions};
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use ir::{InstructionData, DataFlowGraph, Cursor};
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use ir::{Opcode, Type, Inst, Value, Ebb, JumpTable, SigRef, FuncRef, ValueList};
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use ir::immediates::{Imm64, Uimm8, Ieee32, Ieee64, ImmVector};
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use ir::immediates::{Imm64, Uimm8, Ieee32, Ieee64};
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use ir::condcodes::{IntCC, FloatCC};
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/// Base trait for instruction builders.
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@@ -434,12 +434,6 @@ impl FromStr for Ieee64 {
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}
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}
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/// Arbitrary vector immediate.
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///
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/// This kind of immediate can represent any kind of SIMD vector constant.
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/// The representation is simply the sequence of bytes that would be used to store the vector.
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pub type ImmVector = Vec<u8>;
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#[cfg(test)]
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mod tests {
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use super::*;
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@@ -11,7 +11,7 @@ use std::str::FromStr;
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use std::ops::{Deref, DerefMut};
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use ir::{Value, Type, Ebb, JumpTable, SigRef, FuncRef};
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use ir::immediates::{Imm64, Uimm8, Ieee32, Ieee64, ImmVector};
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use ir::immediates::{Imm64, Uimm8, Ieee32, Ieee64};
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use ir::condcodes::*;
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use ir::types;
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use ir::DataFlowGraph;
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@@ -123,11 +123,6 @@ pub enum InstructionData {
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ty: Type,
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imm: Ieee64,
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},
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UnaryImmVector {
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opcode: Opcode,
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ty: Type,
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data: Box<UnaryImmVectorData>,
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},
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UnarySplit {
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opcode: Opcode,
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ty: Type,
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@@ -294,23 +289,6 @@ impl Default for VariableArgs {
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}
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}
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/// Payload data for `vconst`.
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#[derive(Clone, Debug)]
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pub struct UnaryImmVectorData {
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/// Raw vector data.
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pub imm: ImmVector,
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}
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impl Display for UnaryImmVectorData {
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fn fmt(&self, f: &mut Formatter) -> fmt::Result {
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write!(f, "#")?;
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for b in &self.imm {
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write!(f, "{:02x}", b)?;
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}
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Ok(())
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}
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}
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/// Payload data for ternary instructions with multiple results, such as `iadd_carry`.
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#[derive(Clone, Debug)]
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pub struct TernaryOverflowData {
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@@ -233,7 +233,6 @@ fn write_instruction(w: &mut Write,
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UnaryImm { imm, .. } => writeln!(w, " {}", imm),
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UnaryIeee32 { imm, .. } => writeln!(w, " {}", imm),
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UnaryIeee64 { imm, .. } => writeln!(w, " {}", imm),
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UnaryImmVector { ref data, .. } => writeln!(w, " {}", data),
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UnarySplit { arg, .. } => writeln!(w, " {}", arg),
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Binary { args, .. } => writeln!(w, " {}, {}", args[0], args[1]),
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BinaryImm { arg, imm, .. } => writeln!(w, " {}, {}", arg, imm),
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@@ -171,8 +171,7 @@ impl<'a> Context<'a> {
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InstructionData::Nullary { .. } |
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InstructionData::UnaryImm { .. } |
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InstructionData::UnaryIeee32 { .. } |
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InstructionData::UnaryIeee64 { .. } |
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InstructionData::UnaryImmVector { .. } => {}
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InstructionData::UnaryIeee64 { .. } => {}
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InstructionData::Unary { ref mut arg, .. } |
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InstructionData::UnarySplit { ref mut arg, .. } |
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@@ -1335,9 +1334,6 @@ impl<'a> Parser<'a> {
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imm: self.match_ieee64("expected immediate 64-bit float operand")?,
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}
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}
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InstructionFormat::UnaryImmVector => {
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unimplemented!();
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}
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InstructionFormat::UnarySplit => {
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InstructionData::UnarySplit {
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opcode: opcode,
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