Remove the vconst instruction and the UnaryImmVector format.

No instruction sets actually have single instructions for materializing
vector constants. You always need to use a constant pool.

Cretonne doesn't have constant pools yet, but it will in the future, and
that is how vector constants should be represented.
This commit is contained in:
Jakob Stoklund Olesen
2017-03-10 11:57:49 -08:00
parent 60daf3e76b
commit 6021da8e1c
9 changed files with 5 additions and 56 deletions

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@@ -643,7 +643,6 @@ Constant materialization
.. autoinst:: iconst
.. autoinst:: f32const
.. autoinst:: f64const
.. autoinst:: vconst
Live range splitting
--------------------

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@@ -8,7 +8,7 @@ in this module.
from __future__ import absolute_import
from cdsl.formats import InstructionFormat
from cdsl.operands import VALUE, VARIABLE_ARGS
from .immediates import imm64, uimm8, ieee32, ieee64, immvector, intcc, floatcc
from .immediates import imm64, uimm8, ieee32, ieee64, intcc, floatcc
from .entities import ebb, sig_ref, func_ref, jump_table
Nullary = InstructionFormat()
@@ -17,7 +17,6 @@ Unary = InstructionFormat(VALUE)
UnaryImm = InstructionFormat(imm64)
UnaryIeee32 = InstructionFormat(ieee32)
UnaryIeee64 = InstructionFormat(ieee64)
UnaryImmVector = InstructionFormat(immvector, boxed_storage=True)
UnarySplit = InstructionFormat(VALUE, multiple_results=True)
Binary = InstructionFormat(VALUE, VALUE)

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@@ -27,12 +27,6 @@ ieee32 = ImmediateKind('ieee32', 'A 32-bit immediate floating point number.')
#: IEEE 754-2008 binary64 interchange format.
ieee64 = ImmediateKind('ieee64', 'A 64-bit immediate floating point number.')
#: A large SIMD vector constant.
immvector = ImmediateKind(
'immvector',
'An immediate SIMD vector.',
rust_type='ImmVector')
#: A condition code for comparing integer values.
#:
#: This enumerated operand kind is used for the :cton:inst:`icmp` instruction

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@@ -9,7 +9,7 @@ from cdsl.operands import Operand, VARIABLE_ARGS
from cdsl.typevar import TypeVar
from cdsl.instructions import Instruction, InstructionGroup
from base.types import i8, f32, f64, b1
from base.immediates import imm64, uimm8, ieee32, ieee64, immvector
from base.immediates import imm64, uimm8, ieee32, ieee64
from base.immediates import intcc, floatcc
from base import entities
import base.formats # noqa
@@ -196,16 +196,6 @@ f64const = Instruction(
""",
ins=N, outs=a)
N = Operand('N', immvector)
a = Operand('a', TxN, doc='A constant vector value')
vconst = Instruction(
'vconst', r"""
Vector constant (floating point or integer).
Create a SIMD vector value where the lanes don't have to be identical.
""",
ins=N, outs=a)
#
# Generics.
#

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@@ -6,7 +6,7 @@
use ir::{types, instructions};
use ir::{InstructionData, DataFlowGraph, Cursor};
use ir::{Opcode, Type, Inst, Value, Ebb, JumpTable, SigRef, FuncRef, ValueList};
use ir::immediates::{Imm64, Uimm8, Ieee32, Ieee64, ImmVector};
use ir::immediates::{Imm64, Uimm8, Ieee32, Ieee64};
use ir::condcodes::{IntCC, FloatCC};
/// Base trait for instruction builders.

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@@ -434,12 +434,6 @@ impl FromStr for Ieee64 {
}
}
/// Arbitrary vector immediate.
///
/// This kind of immediate can represent any kind of SIMD vector constant.
/// The representation is simply the sequence of bytes that would be used to store the vector.
pub type ImmVector = Vec<u8>;
#[cfg(test)]
mod tests {
use super::*;

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@@ -11,7 +11,7 @@ use std::str::FromStr;
use std::ops::{Deref, DerefMut};
use ir::{Value, Type, Ebb, JumpTable, SigRef, FuncRef};
use ir::immediates::{Imm64, Uimm8, Ieee32, Ieee64, ImmVector};
use ir::immediates::{Imm64, Uimm8, Ieee32, Ieee64};
use ir::condcodes::*;
use ir::types;
use ir::DataFlowGraph;
@@ -123,11 +123,6 @@ pub enum InstructionData {
ty: Type,
imm: Ieee64,
},
UnaryImmVector {
opcode: Opcode,
ty: Type,
data: Box<UnaryImmVectorData>,
},
UnarySplit {
opcode: Opcode,
ty: Type,
@@ -294,23 +289,6 @@ impl Default for VariableArgs {
}
}
/// Payload data for `vconst`.
#[derive(Clone, Debug)]
pub struct UnaryImmVectorData {
/// Raw vector data.
pub imm: ImmVector,
}
impl Display for UnaryImmVectorData {
fn fmt(&self, f: &mut Formatter) -> fmt::Result {
write!(f, "#")?;
for b in &self.imm {
write!(f, "{:02x}", b)?;
}
Ok(())
}
}
/// Payload data for ternary instructions with multiple results, such as `iadd_carry`.
#[derive(Clone, Debug)]
pub struct TernaryOverflowData {

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@@ -233,7 +233,6 @@ fn write_instruction(w: &mut Write,
UnaryImm { imm, .. } => writeln!(w, " {}", imm),
UnaryIeee32 { imm, .. } => writeln!(w, " {}", imm),
UnaryIeee64 { imm, .. } => writeln!(w, " {}", imm),
UnaryImmVector { ref data, .. } => writeln!(w, " {}", data),
UnarySplit { arg, .. } => writeln!(w, " {}", arg),
Binary { args, .. } => writeln!(w, " {}, {}", args[0], args[1]),
BinaryImm { arg, imm, .. } => writeln!(w, " {}, {}", arg, imm),

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@@ -171,8 +171,7 @@ impl<'a> Context<'a> {
InstructionData::Nullary { .. } |
InstructionData::UnaryImm { .. } |
InstructionData::UnaryIeee32 { .. } |
InstructionData::UnaryIeee64 { .. } |
InstructionData::UnaryImmVector { .. } => {}
InstructionData::UnaryIeee64 { .. } => {}
InstructionData::Unary { ref mut arg, .. } |
InstructionData::UnarySplit { ref mut arg, .. } |
@@ -1335,9 +1334,6 @@ impl<'a> Parser<'a> {
imm: self.match_ieee64("expected immediate 64-bit float operand")?,
}
}
InstructionFormat::UnaryImmVector => {
unimplemented!();
}
InstructionFormat::UnarySplit => {
InstructionData::UnarySplit {
opcode: opcode,