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Enable the simd_int_to_int_extend test for AArch64

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Copyright (c) 2021, Arm Limited.
This commit is contained in:
Anton Kirilov
2021-06-02 21:47:18 +01:00
parent 357b4c7b60
commit 5e8a8fe5a0
4 changed files with 29 additions and 15 deletions
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4
cranelift/codegen/src/isa/aarch64/lower_inst.rs
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@@ -3175,6 +3175,10 @@ pub(crate) fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
(I32, Opcode::SwidenHigh) => (VecExtendOp::Sxtl16, true),
(I32, Opcode::UwidenLow) => (VecExtendOp::Uxtl16, false),
(I32, Opcode::UwidenHigh) => (VecExtendOp::Uxtl16, true),
(I64, Opcode::SwidenLow) => (VecExtendOp::Sxtl32, false),
(I64, Opcode::SwidenHigh) => (VecExtendOp::Sxtl32, true),
(I64, Opcode::UwidenLow) => (VecExtendOp::Uxtl32, false),
(I64, Opcode::UwidenHigh) => (VecExtendOp::Uxtl32, true),
_ => {
return Err(CodegenError::Unsupported(format!(
"Unsupported SIMD vector lane type: {:?}",