Legalize several i8 insts (#380)

* Legalize several i8 insts

* X86: implement regmove.{i8,i16}

* Legalize bnot

* Remove comments

* Nicer type param binding in legalize.py

* Legalize sdiv_imm.i8

* Hopefully fix mypy error

* Add missing trailing newlines

* Fix tests

cranelift/filetests/isa/x86/legalize-bnot.cton

@@ -0,0 +1,28 @@
+test compile
+
+target x86_64
+
+function u0:51(i64, i64) system_v {
+    ss0 = explicit_slot 0
+    ss1 = explicit_slot 1
+    ss2 = explicit_slot 1
+    ss3 = explicit_slot 1
+
+ebb0(v0: i64, v1: i64):
+    v2 = stack_addr.i64 ss1
+    v3 = load.i8 v1
+    store v3, v2
+    v4 = stack_addr.i64 ss2
+    v5 = stack_addr.i64 ss3
+    jump ebb1
+
+ebb1:
+    v6 = load.i8 v2
+    store v6, v5
+    v7 = load.i8 v5
+    v8 = bnot v7
+    store v8, v4
+    v9 = load.i8 v4
+    store v9, v0
+    return
+}

cranelift/filetests/isa/x86/legalize-br-table.cton

@@ -0,0 +1,17 @@
+test compile
+
+target x86_64
+
+function u0:0(i64) system_v {
+    ss0 = explicit_slot 1
+    jt0 = jump_table ebb1
+
+ebb0(v0: i64):
+    v1 = stack_addr.i64 ss0
+    v2 = load.i8 v1
+    br_table v2, jt0
+    jump ebb1
+
+ebb1:
+    return
+}

cranelift/filetests/isa/x86/legalize-iconst-i8.cton

@@ -0,0 +1,18 @@
+test compile
+
+target x86_64
+
+function u0:0(i64) system_v {
+    ss0 = explicit_slot 0
+
+ebb0(v0: i64):
+    jump ebb1
+
+ebb1:
+; _0 = const 42u8
+    v1 = iconst.i8 42
+    store v1, v0
+; 
+; return
+    return
+}

cranelift/filetests/isa/x86/legalize-imul-i8.cton

@@ -0,0 +1,11 @@
+test compile
+
+target x86_64
+
+function u0:0(i64, i8, i8) system_v {
+
+ebb0(v0: i64, v1: i8, v2: i8):
+    v11 = imul v1, v2
+    store v11, v0
+    return
+}

cranelift/filetests/isa/x86/legalize-imul-imm-i8.cton

@@ -0,0 +1,15 @@
+test compile
+
+target x86_64
+
+function u0:0(i64, i8) system_v {
+    ss0 = explicit_slot 1
+
+ebb0(v0: i64, v1: i8):
+    v3 = stack_addr.i64 ss0
+    v5 = load.i8 v3
+    v6 = iconst.i8 2
+    v7 = imul_imm v5, 42
+    store v7, v0
+    return
+}

cranelift/filetests/isa/x86/legalize-load-store-i8.cton

@@ -0,0 +1,31 @@
+test compile
+
+target x86_64
+
+function u0:0(i64, i8, i8) system_v {
+    ss0 = explicit_slot 0
+    ss1 = explicit_slot 1
+    ss2 = explicit_slot 1
+    ss3 = explicit_slot 1
+    ss4 = explicit_slot 1
+
+ebb0(v0: i64, v1: i8, v2: i8):
+    v3 = stack_addr.i64 ss1
+    store v1, v3
+    v4 = stack_addr.i64 ss2
+    store v2, v4
+    v5 = stack_addr.i64 ss3
+    v6 = stack_addr.i64 ss4
+    jump ebb1
+
+ebb1:
+    v7 = load.i8 v3
+    store v7, v5
+    v8 = load.i8 v4
+    store v8, v6
+    v9 = load.i8 v5
+    v10 = load.i8 v6
+    v11 = imul v9, v10
+    store v11, v0
+    return
+}

cranelift/filetests/isa/x86/legalize-regmove-i8.cton

@@ -0,0 +1,36 @@
+test compile
+
+target x86_64
+
+function u0:0(i64, i64, i64) system_v {
+    ss0 = explicit_slot 0
+    ss1 = explicit_slot 8
+    ss2 = explicit_slot 8
+    ss3 = explicit_slot 2
+    ss4 = explicit_slot 8
+    sig0 = (i64, i16, i64) system_v
+    fn0 = colocated u0:11 sig0
+
+ebb0(v0: i64, v1: i64, v2: i64):
+    v3 = stack_addr.i64 ss1
+    store v1, v3
+    v4 = stack_addr.i64 ss2
+    store v2, v4
+    v5 = stack_addr.i64 ss3
+    v6 = stack_addr.i64 ss4
+    jump ebb1
+
+ebb1:
+    v7 = load.i64 v3
+    v8 = load.i16 v7
+    store v8, v5
+    v9 = load.i64 v4
+    store v9, v6
+    v10 = load.i16 v5
+    v11 = load.i64 v6
+    call fn0(v0, v10, v11)
+    jump ebb2
+
+ebb2:
+    return
+}