x64: port fcmp to ISLE (#3967)
* x64: port scalar `fcmp` to ISLE Implement the CLIF lowering for the `fcmp` to ISLE. This adds a new type-matcher, `ty_scalar_float`, for detecting uses of `F32` and `F64`. * isle: rename `vec128` to `ty_vec12` This refactoring changes the name of the `vec128` matcher function to follow the `ty_*` convention of the other type matchers. It also makes the helper an inline function call. * x64: port vector `fcmp` to ISLE
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@@ -2092,7 +2092,11 @@
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imm
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size))
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;; Helper for creating `cmpps` instructions.
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;; Helpers for creating `cmpp*` instructions.
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(decl x64_cmpp (Type Xmm XmmMem FcmpImm) Xmm)
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(rule (x64_cmpp $F32X4 x y imm) (x64_cmpps x y imm))
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(rule (x64_cmpp $F64X2 x y imm) (x64_cmppd x y imm))
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(decl x64_cmpps (Xmm XmmMem FcmpImm) Xmm)
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(rule (x64_cmpps src1 src2 imm)
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(xmm_rm_r_imm (SseOpcode.Cmpps)
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@@ -2101,6 +2105,17 @@
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(encode_fcmp_imm imm)
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(OperandSize.Size32)))
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;; Note that `Size32` is intentional despite this being used for 64-bit
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;; operations, since this presumably induces the correct encoding of the
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;; instruction.
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(decl x64_cmppd (Xmm XmmMem FcmpImm) Xmm)
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(rule (x64_cmppd src1 src2 imm)
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(xmm_rm_r_imm (SseOpcode.Cmppd)
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src1
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src2
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(encode_fcmp_imm imm)
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(OperandSize.Size32)))
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;; Helper for creating `pinsrb` instructions.
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(decl x64_pinsrb (Xmm GprMem u8) Xmm)
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(rule (x64_pinsrb src1 src2 lane)
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@@ -2321,19 +2336,6 @@
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(operand_size_of_type_32_64 (lane_type ty))))))
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dst))
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;; Helper for creating `cmppd` instructions.
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;;
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;; Note that `Size32` is intentional despite this being used for 64-bit
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;; operations, since this presumably induces the correct encoding of the
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;; instruction.
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(decl x64_cmppd (Xmm XmmMem FcmpImm) Xmm)
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(rule (x64_cmppd src1 src2 imm)
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(xmm_rm_r_imm (SseOpcode.Cmppd)
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src1
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src2
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(encode_fcmp_imm imm)
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(OperandSize.Size32)))
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;; Helper for creating `MInst.GprToXmm` instructions.
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(decl gpr_to_xmm (SseOpcode GprMem OperandSize) Xmm)
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(rule (gpr_to_xmm op src size)
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