Cranelift 9/20 meeting notes (#3374)
* Cranelift 9/20 meeting notes * Update cranelift-09-20.md
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1. Other agenda items
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1. Further discussion of ISLE, the proposed instruction selector DSL, as outlined in [RFC #15](https://github.com/bytecodealliance/rfcs/pull/15)
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## Notes
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### Attendees
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* cfallin
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* fitzgen
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* uweigand
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* alexcrichton
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* bjorn3
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* afonso360
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* akirilov
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* jlbirch
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### Notes
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#### ISLE
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* cfallin - Hoping bbouvier could be here but conflict! Will catch up later. Anyone
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have any concerns to discuss?
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* jlbirch - what were concerns?
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* cfallin - not necessarily as "simple" as what we have right now. Currently
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everything is straightforward to jump in and "see" Rust code. Tracing things
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is easy and you can see what to modify. Also works with IDEs and rust-analyzer
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and other Rust tools. bbouvier wants to preserve this if possible since it's
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open and inviting, minimal knowledge required. Downside is that the benefits
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of the DSL aren't there, fitzgen and I mentioned on thread. There are
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some things we can only do with a DSL such as verification, optimizations,
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refactorings (new regalloc API), ... I think it's also more open and welcoming
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if you can understand the patterns and see them, that way you don't track
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subtle invariants from custom open-coding. More welcoming with custom language
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or to have Rust to read?
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* fitzgen - The goal of the DSL should be to thinking about the domain at hand
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rather than the low-level bits and I think it does a good job of that. If you
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see some lowering is missing adding the new operation should be writing a
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pattern and just focusing on the pattern, not also how it fits into the
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hand-written matcher-trees. With the DSL compiler handling all that it's nice
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that it handles performance (optimized lowering) but you're also just talking
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about the pattern you want to match instead of manually doing the lowering.
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* cfallin - aspect oriented programming anyone? The DSL brings all the little
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things spread throughout the code into one place in the compiler -- raising
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the level of abstraction and not having to worry about doing unsafe or illegal
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things. Understand Ben's concerns though. Anyone else have similar concerns?
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* akirilov - I'm in the middle, leaning towards what you're describing with
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ISLE.
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* jlbirch - Worked on compilers awhile ago! No DSL involved. Mostly with
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bytecodealliance I've seen DSLs. Would ISLE looks similar to the wasm backend
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for v8?
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* cfallin - not familiar with v8, but you/Andrew have described open-coding, is
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that right?
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* jlbirch - looking at a lowering language of some sorts
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* cfallin - link?
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* jlbirch - should be able to compare what we have to v8 and how it's easy to
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look at and dive in. Haven't had experience debugging v8 though and that's
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presumably where the issues come in.
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* cfallin - speaks to a tooling concern and trace what some code becomes and
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why. The output of the DSL should be human readable and should ideally have
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comments for where things came from. Does this in the prototype, not beautiful
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code but still readable. Has comments though and says "this came from ISLE
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line 123". Should be able to step through and see various cases. Maybe higher
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level thing like log/trace to show what was applied? I understand the
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debugging point though, very important.
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* fitzgen - regarding what other compilers do, gcc has its own DSL, LLVM has
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tablegen, Go has a DSL for this sort of thing. ISLE does have unique things
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but this shouldn't be too too foreign.
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* cfallin - "term rewriting system" - studied for awhile -- not to say it's
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automatically easier. Is understood though.
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* jlbirch - Yeah understand it's not too too crazy. Trying to imagine someone
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with no experience in compilers jumping in.
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* cfallin - Trying to prevent bugs that have come in with ISLE preventing things
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from being incorrect. Lots of stuff to worry about today with
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regalloc/metadata/sinking loads/etc. Extra mental state we don't want authors
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to have to carry with ISLE.
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* jlbirch - generally agree
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* cfallin - should catch up with Ben later. Sounds like others agree?
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* akirilov - haven't touched the old backend which seems like it has a somewhat
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similar DSL. Would be good to have a guide for how to add a new instruction.
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Main challenge is that there's no guide right now and would be helpful to
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have. Good to know how to add one instruction and to debug.
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* cfallin - good idea!
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* akirilov - ideally information is close to the project (as opposed to blog
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posts, which are great!) since contributors may not always be aware of
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articles. We have Wasmtime guide with section for contributing? Doesn't cover
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Cranelift though.
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* cfallin - Whole `docs` repo to write stuff into, would be great to do.
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* fitzgen - would be good to have Cranelift-specific book.
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* cfallin - yes!
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* akirilov - should link from the Wasmtime book since it appears at the top of
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the repository. Cranelift should be visible too.
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* cfallin - agreed! Should document new instructions, new lowerings. Could
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probably source from RFCs and such.
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* cfallin - brief mention of progress. The prototype of ISLE exists and they can
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dig into it. Happy to explain more in a call. Nick is going to try to carry
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forward and implement more things end-to-end with polish. Nick?
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* fitzgen - Plan is to get one lowering implemented all the way through with
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ISLE and then try ISLE first in existing lowering, falling back to handwritten
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thing. Afterwards knocking out all the patterns. Probably still a week or so.
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This'll quickly be parallelizable where it's mostly just porting patterns,
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talk to me!
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* jlbirch - will do my homework and reread these issues and will take you both
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up on the offer and plan to help out
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* fitzgen - Looking at pattern -> Rust code translation was very helpful and
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gave me confidence that it's doing what it should do. Confident approach is
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nice and could understand well that what I'm doing maps well.
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* cfallin - any other thoughts on ISLE?
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#### Endianness
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* cfallin - Thank you s390x for making sure we're correct here! Consensus last
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year we have tri-state approach, we have a little/big/native flag on all
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loads/stores. Native important for interacting with the rest of the system.
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Concern that with the interpreter that this makes clif behavior
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platform-dependent. Should have a single defined semantics for clif to prevent
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breaking things up the stack. The suggestion in the issue is that we
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reconsider this and go back to a world where have explicit endian on
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everything, and for native things we bake it in based on the knowledge when we
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generate the clif. Basic approach is to do what other compilers do like LLVM
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with early-bind rather than late-bind. Any objections?
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* akirilov - agree! Especially about clif semantics I agree we don't want them
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dependent on the interpreter's host platform.
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* cfallin - ok sounds like not much controversy. Sticky point is the API change.
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When you create a clif function or you get a builder you need to give a notion
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of endianness if not more platform information. Corresponds to LLVM which has
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datalayout at the top of every file. Don't think that this will break things
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other than that it's an API change which you should already know.
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* uweigand - Confused about how other IRs have been created from the start for a
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particular target and will build different IR for different targets. Have to
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know the target for the IR to do anything with it anyway. Need to keep
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specifying the same target when working with the same file. Or LLVM annotates
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at the top. Sometimes datalayout also has target too. Having an interpreter
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which doesn't know the intended target will really fully work even if
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endianness is fixed. Won't there be other reasons?
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* cfallin - one distinction is that the specific target is less important and
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more important about details like endianness. Native loads/stores defined by
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this. Pointer width can also be important. If you give me x86 IR it should be
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possible to in theory compile on a 64-bit big-endian system with byteswaps?
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* uweigand - don't have a full overview of the IR, but wondering if we have
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things like pointer offsets which changes offsets and such?
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* cfallin - not in the same way of LLVM, the code producer might assume this and
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we may want to check. How would this work. If we're lowering heap_addr on
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64-bit system from IR targeted from 32-bit system maybe...
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* uweigand - the specific question seems fine here, tried last year and it
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seemed possible. Lots of code to change though, including code outside of the
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Cranelift repository.
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* cfallin - no API stability right now though. Folks here produce clif IR so
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this would impact you. Providing endianness to a builder isn't the biggest
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dealbreaker though since it's often ...
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* fitzgen - to what uweigand said, the front/middle generate different IR
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depending on the backend. Are we doing this today in Cranelift? All else being
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equal it would be nice if we always generated the same IR. Some issues with
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endianness though. I liked you recent comment of setting the endianness once
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and still a tri-state native option, but native is explicitly defined. If the
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declaration of what native is the only thing that's different that seems like
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a nice property.
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* uweigand - to clarify I wasn't referring to Cranelift, referring to compilers
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like gcc/LLVM where it generates different IR since IR already encodes
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features like the calling convention, struct sizes, etc.
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* cfallin - we don't have calling convention details but we do have struct
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layout depending on what the producer is doing. No concept of struct in
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cranelift, but we do have producers that compile structs. Pointer-width fields
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have different sizes.
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- acrichto - wasmtime has platform dependent things for VMContext yeah
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- afonso - control type for stack\_addr and such is pointer type
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- cfallin - if you use 32-bit on 64-bit should be compiled correctly? Would be
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nice to be independent but there's lots of details
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- fitzgen - imagining on the cranelift-wasm frontend it's the same
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- cfallin - I think it's already true except argument loads/stores?
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- uweigand - other way around. All loads/store have explicit endianness. More
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places "leave native" than use little. Most probably use little-endian though
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since it's wasm.
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- cfallin - almost have this property nick? maybe don't enforce?
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- fitzgen - we have environment traits which customize things we want different.
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Not mad about hook points for those using the frontend. If cranelift-wasm
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decides to ask about the current platform and change the lowering that feels
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bad.
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- cfallin - agreed that's bad. This should be used to make behavior
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deterministic. Don't have other platform-specific properties.
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- bjorn3 - how test native loads/stores?
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- cfallin - different tests? No duplication? Not sure I understand.
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- cfallin - other points? Ok sounds like a reasonable approach, Afonso would you
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like to try this?
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- afonso - Will probably need guidance but happy to try.
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#### Status
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- cfallin: ISLE!
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- uweigand: s390x - final patches merged and testsuite passes out-of-the-box. PR
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to add s390x to CI. As we were speaking the run finished!
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- akirilov: looking into pointer authentication support and code branch target
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indication. These two are related. Just starting to working on an RFC since
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this will probably merit discussions.
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