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cranelift: Port ineg SIMD lowering to ISLE on x64

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This commit is contained in:
Nick Fitzgerald
2022-01-13 15:18:15 -08:00
parent 5917f1d2c2
commit 5bb3645bd4
7 changed files with 208 additions and 167 deletions
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4
cranelift/codegen/src/isa/x64/inst.isle
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@@ -726,7 +726,7 @@
(decl imm (Type u64) Reg)
;; Integer immediates.
(rule (imm ty simm64)
(rule (imm (fits_in_64 ty) simm64)
(let ((dst WritableReg (temp_writable_reg ty))
(size OperandSize (operand_size_of_type_32_64 ty))
(_ Unit (emit (MInst.Imm size simm64 dst))))
@@ -751,7 +751,7 @@
(writable_reg_to_reg dst)))
;; Special case for integer zero immediates: turn them into an `xor r, r`.
(rule (imm ty 0)
(rule (imm (fits_in_64 ty) 0)
(let ((wr WritableReg (temp_writable_reg ty))
(r Reg (writable_reg_to_reg wr))
(size OperandSize (operand_size_of_type_32_64 ty))