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[AArch64] Merge 32- and 64-bit BitOps (#3840)

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Copyright (c) 2022, Arm Limited.
This commit is contained in:
Sam Parker
2022-02-23 19:36:23 +00:00
committed by GitHub
parent d307a4ab9a
commit 5b7df72bce
7 changed files with 541 additions and 610 deletions
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18
cranelift/codegen/src/isa/aarch64/inst/emit_tests.rs
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@@ -1262,7 +1262,8 @@ fn test_aarch64_binemit() {
insns.push((
Inst::BitRR {
op: BitOp::RBit32,
op: BitOp::RBit,
size: OperandSize::Size32,
rd: writable_xreg(1),
rn: xreg(10),
},
@@ -1272,7 +1273,8 @@ fn test_aarch64_binemit() {
insns.push((
Inst::BitRR {
op: BitOp::RBit64,
op: BitOp::RBit,
size: OperandSize::Size64,
rd: writable_xreg(1),
rn: xreg(10),
},
@@ -1282,7 +1284,8 @@ fn test_aarch64_binemit() {
insns.push((
Inst::BitRR {
op: BitOp::Clz32,
op: BitOp::Clz,
size: OperandSize::Size32,
rd: writable_xreg(15),
rn: xreg(3),
},
@@ -1292,7 +1295,8 @@ fn test_aarch64_binemit() {
insns.push((
Inst::BitRR {
op: BitOp::Clz64,
op: BitOp::Clz,
size: OperandSize::Size64,
rd: writable_xreg(15),
rn: xreg(3),
},
@@ -1302,7 +1306,8 @@ fn test_aarch64_binemit() {
insns.push((
Inst::BitRR {
op: BitOp::Cls32,
op: BitOp::Cls,
size: OperandSize::Size32,
rd: writable_xreg(21),
rn: xreg(16),
},
@@ -1312,7 +1317,8 @@ fn test_aarch64_binemit() {
insns.push((
Inst::BitRR {
op: BitOp::Cls64,
op: BitOp::Cls,
size: OperandSize::Size64,
rd: writable_xreg(21),
rn: xreg(16),
},