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x64: Take SIGFPE signals for divide traps (#6026)

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* x64: Take SIGFPE signals for divide traps

Prior to this commit Wasmtime would configure `avoid_div_traps=true`
unconditionally for Cranelift. This, for the division-based
instructions, would change emitted code to explicitly trap on trap
conditions instead of letting the `div` x86 instruction trap.

There's no specific reason for Wasmtime, however, to specifically avoid
traps in the `div` instruction. This means that the extra generated
branches on x86 aren't necessary since the `div` and `idiv` instructions
already trap for similar conditions as wasm requires.

This commit instead disables the `avoid_div_traps` setting for
Wasmtime's usage of Cranelift. Subsequently the codegen rules were
updated slightly:

* When `avoid_div_traps=true`, traps are no longer emitted for `div`
  instructions.
* The `udiv`/`urem` instructions now list their trap as divide-by-zero
  instead of integer overflow.
* The lowering for `sdiv` was updated to still explicitly check for zero
  but the integer overflow case is deferred to the instruction itself.
* The lowering of `srem` no longer checks for zero and the listed trap
  for the `div` instruction is a divide-by-zero.

This means that the codegen for `udiv` and `urem` no longer have any
branches. The codegen for `sdiv` removes one branch but keeps the
zero-check to differentiate the two kinds of traps. The codegen for
`srem` removes one branch but keeps the -1 check since the semantics of
`srem` mismatch with the semantics of `idiv` with a -1 divisor
(specifically for INT_MIN).

This is unlikely to have really all that much of a speedup but was
something I noticed during #6008 which seemed like it'd be good to clean
up. Plus Wasmtime's signal handling was already set up to catch
`SIGFPE`, it was just never firing.

* Remove the `avoid_div_traps` cranelift setting

With no known users currently removing this should be possible and helps
simplify the x64 backend.

* x64: GC more support for avoid_div_traps

Remove the `validate_sdiv_divisor*` pseudo-instructions and clean up
some of the ISLE rules now that `div` is allowed to itself trap
unconditionally.

* x64: Store div trap code in instruction itself

* Keep divisors in registers, not in memory

Don't accidentally fold multiple traps together

* Handle EXC_ARITHMETIC on macos

* Update emit tests

* Update winch and tests
This commit is contained in:
Alex Crichton
2023-03-15 19:18:45 -05:00
committed by GitHub
parent 5ff2824ebb
commit 5ae8575296
72 changed files with 505 additions and 2624 deletions
Download Patch File Download Diff File Expand all files Collapse all files

63
winch/codegen/src/isa/x64/asm.rs
View File

@@ -282,34 +282,13 @@ impl Assembler {
/// caller has correctly allocated the dividend as `(rdx:rax)` and
/// accounted for the quotient to be stored in `rax`.
pub fn div(&mut self, divisor: Reg, dst: (Reg, Reg), kind: DivKind, size: OperandSize) {
match kind {
// Signed division goes through a pseudo-instruction to validate
// the divisor followed by a sign extension to initialize `rdx`.
let trap = match kind {
// Signed division has two trapping conditions, integer overflow and
// divide-by-zero. Check for divide-by-zero explicitly and let the
// hardware detect overflow.
//
// The dividend is sign extended to initialize `rdx`.
DivKind::Signed => {
if size == OperandSize::S64 {
self.emit(Inst::ValidateSdivDivisor64 {
dividend: dst.0.into(),
divisor: divisor.into(),
tmp: regs::scratch().into(),
});
} else {
self.emit(Inst::ValidateSdivDivisor {
dividend: dst.0.into(),
divisor: divisor.into(),
size: size.into(),
});
}
self.emit(Inst::SignExtendData {
size: size.into(),
src: dst.0.into(),
dst: dst.1.into(),
});
}
// Unsigned division only needs to check for 0 and then the `rdx`
// divisor_hi is initialized with zero through an xor-against-itself
// op.
DivKind::Unsigned => {
self.emit(Inst::CmpRmiR {
size: size.into(),
src: GprMemImm::new(RegMemImm::imm(0)).unwrap(),
@@ -320,6 +299,20 @@ impl Assembler {
cc: CC::Z,
trap_code: TrapCode::IntegerDivisionByZero,
});
self.emit(Inst::SignExtendData {
size: size.into(),
src: dst.0.into(),
dst: dst.1.into(),
});
TrapCode::IntegerOverflow
}
// Unsigned division only traps in one case, on divide-by-zero, so
// defer that to the trap opcode.
//
// The divisor_hi reg is initialized with zero through an
// xor-against-itself op.
DivKind::Unsigned => {
self.emit(Inst::AluRmiR {
size: size.into(),
op: AluRmiROpcode::Xor,
@@ -327,11 +320,13 @@ impl Assembler {
src2: dst.1.into(),
dst: dst.1.into(),
});
TrapCode::IntegerDivisionByZero
}
}
};
self.emit(Inst::Div {
sign: kind.into(),
size: size.into(),
trap,
divisor: GprMem::new(RegMem::reg(divisor.into())).unwrap(),
dividend_lo: dst.0.into(),
dividend_hi: dst.1.into(),
@@ -348,17 +343,6 @@ impl Assembler {
/// caller has correctly allocated the dividend as `(rdx:rax)` and
/// accounted for the remainder to be stored in `rdx`.
pub fn rem(&mut self, divisor: Reg, dst: (Reg, Reg), kind: RemKind, size: OperandSize) {
// First check for zero and explicitly trap.
self.emit(Inst::CmpRmiR {
size: size.into(),
src: GprMemImm::new(RegMemImm::imm(0)).unwrap(),
dst: divisor.into(),
opcode: CmpOpcode::Cmp,
});
self.emit(Inst::TrapIf {
cc: CC::Z,
trap_code: TrapCode::IntegerDivisionByZero,
});
match kind {
// Signed remainder goes through a pseudo-instruction which has
// some internal branching. The `dividend_hi`, or `rdx`, is
@@ -391,6 +375,7 @@ impl Assembler {
});
self.emit(Inst::Div {
sign: DivSignedness::Unsigned,
trap: TrapCode::IntegerDivisionByZero,
size: size.into(),
divisor: GprMem::new(RegMem::reg(divisor.into())).unwrap(),
dividend_lo: dst.0.into(),

13
winch/filetests/filetests/x64/i32_divs/const.wat
View File

@@ -14,12 +14,7 @@
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 83f9ff cmp ecx, -1
;; 1c: 0f850e000000 jne 0x30
;; 22: 81f800000080 cmp eax, 0x80000000
;; 28: 0f8502000000 jne 0x30
;; 2e: 0f0b ud2
;; 30: 99 cdq
;; 31: f7f9 idiv ecx
;; 33: 5d pop rbp
;; 34: c3 ret
;; 19: 99 cdq
;; 1a: f7f9 idiv ecx
;; 1c: 5d pop rbp
;; 1d: c3 ret

13
winch/filetests/filetests/x64/i32_divs/one_zero.wat
View File

@@ -14,12 +14,7 @@
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 83f9ff cmp ecx, -1
;; 1c: 0f850e000000 jne 0x30
;; 22: 81f800000080 cmp eax, 0x80000000
;; 28: 0f8502000000 jne 0x30
;; 2e: 0f0b ud2
;; 30: 99 cdq
;; 31: f7f9 idiv ecx
;; 33: 5d pop rbp
;; 34: c3 ret
;; 19: 99 cdq
;; 1a: f7f9 idiv ecx
;; 1c: 5d pop rbp
;; 1d: c3 ret

13
winch/filetests/filetests/x64/i32_divs/overflow.wat
View File

@@ -14,12 +14,7 @@
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 83f9ff cmp ecx, -1
;; 1c: 0f850e000000 jne 0x30
;; 22: 81f800000080 cmp eax, 0x80000000
;; 28: 0f8502000000 jne 0x30
;; 2e: 0f0b ud2
;; 30: 99 cdq
;; 31: f7f9 idiv ecx
;; 33: 5d pop rbp
;; 34: c3 ret
;; 19: 99 cdq
;; 1a: f7f9 idiv ecx
;; 1c: 5d pop rbp
;; 1d: c3 ret

15
winch/filetests/filetests/x64/i32_divs/params.wat
View File

@@ -17,13 +17,8 @@
;; 16: 83f900 cmp ecx, 0
;; 19: 0f8502000000 jne 0x21
;; 1f: 0f0b ud2
;; 21: 83f9ff cmp ecx, -1
;; 24: 0f850e000000 jne 0x38
;; 2a: 81f800000080 cmp eax, 0x80000000
;; 30: 0f8502000000 jne 0x38
;; 36: 0f0b ud2
;; 38: 99 cdq
;; 39: f7f9 idiv ecx
;; 3b: 4883c408 add rsp, 8
;; 3f: 5d pop rbp
;; 40: c3 ret
;; 21: 99 cdq
;; 22: f7f9 idiv ecx
;; 24: 4883c408 add rsp, 8
;; 28: 5d pop rbp
;; 29: c3 ret

13
winch/filetests/filetests/x64/i32_divs/zero_zero.wat
View File

@@ -14,12 +14,7 @@
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 83f9ff cmp ecx, -1
;; 1c: 0f850e000000 jne 0x30
;; 22: 81f800000080 cmp eax, 0x80000000
;; 28: 0f8502000000 jne 0x30
;; 2e: 0f0b ud2
;; 30: 99 cdq
;; 31: f7f9 idiv ecx
;; 33: 5d pop rbp
;; 34: c3 ret
;; 19: 99 cdq
;; 1a: f7f9 idiv ecx
;; 1c: 5d pop rbp
;; 1d: c3 ret

11
winch/filetests/filetests/x64/i32_divu/const.wat
View File

@@ -11,10 +11,7 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: b90a000000 mov ecx, 0xa
;; 9: b814000000 mov eax, 0x14
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 31d2 xor edx, edx
;; 1b: f7f1 div ecx
;; 1d: 5d pop rbp
;; 1e: c3 ret
;; e: 31d2 xor edx, edx
;; 10: f7f1 div ecx
;; 12: 5d pop rbp
;; 13: c3 ret

11
winch/filetests/filetests/x64/i32_divu/one_zero.wat
View File

@@ -11,10 +11,7 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: b900000000 mov ecx, 0
;; 9: b801000000 mov eax, 1
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 31d2 xor edx, edx
;; 1b: f7f1 div ecx
;; 1d: 5d pop rbp
;; 1e: c3 ret
;; e: 31d2 xor edx, edx
;; 10: f7f1 div ecx
;; 12: 5d pop rbp
;; 13: c3 ret

13
winch/filetests/filetests/x64/i32_divu/params.wat
View File

@@ -14,11 +14,8 @@
;; c: 893424 mov dword ptr [rsp], esi
;; f: 8b0c24 mov ecx, dword ptr [rsp]
;; 12: 8b442404 mov eax, dword ptr [rsp + 4]
;; 16: 83f900 cmp ecx, 0
;; 19: 0f8502000000 jne 0x21
;; 1f: 0f0b ud2
;; 21: 31d2 xor edx, edx
;; 23: f7f1 div ecx
;; 25: 4883c408 add rsp, 8
;; 29: 5d pop rbp
;; 2a: c3 ret
;; 16: 31d2 xor edx, edx
;; 18: f7f1 div ecx
;; 1a: 4883c408 add rsp, 8
;; 1e: 5d pop rbp
;; 1f: c3 ret

11
winch/filetests/filetests/x64/i32_divu/signed.wat
View File

@@ -11,10 +11,7 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: b9ffffffff mov ecx, 0xffffffff
;; 9: b8ffffffff mov eax, 0xffffffff
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 31d2 xor edx, edx
;; 1b: f7f1 div ecx
;; 1d: 5d pop rbp
;; 1e: c3 ret
;; e: 31d2 xor edx, edx
;; 10: f7f1 div ecx
;; 12: 5d pop rbp
;; 13: c3 ret

11
winch/filetests/filetests/x64/i32_divu/zero_zero.wat
View File

@@ -11,10 +11,7 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: b900000000 mov ecx, 0
;; 9: b800000000 mov eax, 0
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 31d2 xor edx, edx
;; 1b: f7f1 div ecx
;; 1d: 5d pop rbp
;; 1e: c3 ret
;; e: 31d2 xor edx, edx
;; 10: f7f1 div ecx
;; 12: 5d pop rbp
;; 13: c3 ret

21
winch/filetests/filetests/x64/i32_rems/const.wat
View File

@@ -11,15 +11,12 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: b905000000 mov ecx, 5
;; 9: b807000000 mov eax, 7
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 99 cdq
;; 1a: 83f9ff cmp ecx, -1
;; 1d: 0f850a000000 jne 0x2d
;; 23: ba00000000 mov edx, 0
;; 28: e902000000 jmp 0x2f
;; 2d: f7f9 idiv ecx
;; 2f: 4889d0 mov rax, rdx
;; 32: 5d pop rbp
;; 33: c3 ret
;; e: 99 cdq
;; f: 83f9ff cmp ecx, -1
;; 12: 0f850a000000 jne 0x22
;; 18: ba00000000 mov edx, 0
;; 1d: e902000000 jmp 0x24
;; 22: f7f9 idiv ecx
;; 24: 4889d0 mov rax, rdx
;; 27: 5d pop rbp
;; 28: c3 ret

21
winch/filetests/filetests/x64/i32_rems/one_zero.wat
View File

@@ -11,15 +11,12 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: b900000000 mov ecx, 0
;; 9: b801000000 mov eax, 1
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 99 cdq
;; 1a: 83f9ff cmp ecx, -1
;; 1d: 0f850a000000 jne 0x2d
;; 23: ba00000000 mov edx, 0
;; 28: e902000000 jmp 0x2f
;; 2d: f7f9 idiv ecx
;; 2f: 4889d0 mov rax, rdx
;; 32: 5d pop rbp
;; 33: c3 ret
;; e: 99 cdq
;; f: 83f9ff cmp ecx, -1
;; 12: 0f850a000000 jne 0x22
;; 18: ba00000000 mov edx, 0
;; 1d: e902000000 jmp 0x24
;; 22: f7f9 idiv ecx
;; 24: 4889d0 mov rax, rdx
;; 27: 5d pop rbp
;; 28: c3 ret

21
winch/filetests/filetests/x64/i32_rems/overflow.wat
View File

@@ -11,15 +11,12 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: b9ffffffff mov ecx, 0xffffffff
;; 9: b800000080 mov eax, 0x80000000
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 99 cdq
;; 1a: 83f9ff cmp ecx, -1
;; 1d: 0f850a000000 jne 0x2d
;; 23: ba00000000 mov edx, 0
;; 28: e902000000 jmp 0x2f
;; 2d: f7f9 idiv ecx
;; 2f: 4889d0 mov rax, rdx
;; 32: 5d pop rbp
;; 33: c3 ret
;; e: 99 cdq
;; f: 83f9ff cmp ecx, -1
;; 12: 0f850a000000 jne 0x22
;; 18: ba00000000 mov edx, 0
;; 1d: e902000000 jmp 0x24
;; 22: f7f9 idiv ecx
;; 24: 4889d0 mov rax, rdx
;; 27: 5d pop rbp
;; 28: c3 ret

23
winch/filetests/filetests/x64/i32_rems/params.wat
View File

@@ -14,16 +14,13 @@
;; c: 893424 mov dword ptr [rsp], esi
;; f: 8b0c24 mov ecx, dword ptr [rsp]
;; 12: 8b442404 mov eax, dword ptr [rsp + 4]
;; 16: 83f900 cmp ecx, 0
;; 19: 0f8502000000 jne 0x21
;; 1f: 0f0b ud2
;; 21: 99 cdq
;; 22: 83f9ff cmp ecx, -1
;; 25: 0f850a000000 jne 0x35
;; 2b: ba00000000 mov edx, 0
;; 30: e902000000 jmp 0x37
;; 35: f7f9 idiv ecx
;; 37: 4889d0 mov rax, rdx
;; 3a: 4883c408 add rsp, 8
;; 3e: 5d pop rbp
;; 3f: c3 ret
;; 16: 99 cdq
;; 17: 83f9ff cmp ecx, -1
;; 1a: 0f850a000000 jne 0x2a
;; 20: ba00000000 mov edx, 0
;; 25: e902000000 jmp 0x2c
;; 2a: f7f9 idiv ecx
;; 2c: 4889d0 mov rax, rdx
;; 2f: 4883c408 add rsp, 8
;; 33: 5d pop rbp
;; 34: c3 ret

21
winch/filetests/filetests/x64/i32_rems/zero_zero.wat
View File

@@ -11,15 +11,12 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: b900000000 mov ecx, 0
;; 9: b800000000 mov eax, 0
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 99 cdq
;; 1a: 83f9ff cmp ecx, -1
;; 1d: 0f850a000000 jne 0x2d
;; 23: ba00000000 mov edx, 0
;; 28: e902000000 jmp 0x2f
;; 2d: f7f9 idiv ecx
;; 2f: 4889d0 mov rax, rdx
;; 32: 5d pop rbp
;; 33: c3 ret
;; e: 99 cdq
;; f: 83f9ff cmp ecx, -1
;; 12: 0f850a000000 jne 0x22
;; 18: ba00000000 mov edx, 0
;; 1d: e902000000 jmp 0x24
;; 22: f7f9 idiv ecx
;; 24: 4889d0 mov rax, rdx
;; 27: 5d pop rbp
;; 28: c3 ret

13
winch/filetests/filetests/x64/i32_remu/const.wat
View File

@@ -11,11 +11,8 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: b905000000 mov ecx, 5
;; 9: b807000000 mov eax, 7
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 31d2 xor edx, edx
;; 1b: f7f1 div ecx
;; 1d: 4889d0 mov rax, rdx
;; 20: 5d pop rbp
;; 21: c3 ret
;; e: 31d2 xor edx, edx
;; 10: f7f1 div ecx
;; 12: 4889d0 mov rax, rdx
;; 15: 5d pop rbp
;; 16: c3 ret

13
winch/filetests/filetests/x64/i32_remu/one_zero.wat
View File

@@ -11,11 +11,8 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: b900000000 mov ecx, 0
;; 9: b801000000 mov eax, 1
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 31d2 xor edx, edx
;; 1b: f7f1 div ecx
;; 1d: 4889d0 mov rax, rdx
;; 20: 5d pop rbp
;; 21: c3 ret
;; e: 31d2 xor edx, edx
;; 10: f7f1 div ecx
;; 12: 4889d0 mov rax, rdx
;; 15: 5d pop rbp
;; 16: c3 ret

15
winch/filetests/filetests/x64/i32_remu/params.wat
View File

@@ -14,12 +14,9 @@
;; c: 893424 mov dword ptr [rsp], esi
;; f: 8b0c24 mov ecx, dword ptr [rsp]
;; 12: 8b442404 mov eax, dword ptr [rsp + 4]
;; 16: 83f900 cmp ecx, 0
;; 19: 0f8502000000 jne 0x21
;; 1f: 0f0b ud2
;; 21: 31d2 xor edx, edx
;; 23: f7f1 div ecx
;; 25: 4889d0 mov rax, rdx
;; 28: 4883c408 add rsp, 8
;; 2c: 5d pop rbp
;; 2d: c3 ret
;; 16: 31d2 xor edx, edx
;; 18: f7f1 div ecx
;; 1a: 4889d0 mov rax, rdx
;; 1d: 4883c408 add rsp, 8
;; 21: 5d pop rbp
;; 22: c3 ret

13
winch/filetests/filetests/x64/i32_remu/signed.wat
View File

@@ -11,11 +11,8 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: b9ffffffff mov ecx, 0xffffffff
;; 9: b8ffffffff mov eax, 0xffffffff
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 31d2 xor edx, edx
;; 1b: f7f1 div ecx
;; 1d: 4889d0 mov rax, rdx
;; 20: 5d pop rbp
;; 21: c3 ret
;; e: 31d2 xor edx, edx
;; 10: f7f1 div ecx
;; 12: 4889d0 mov rax, rdx
;; 15: 5d pop rbp
;; 16: c3 ret

13
winch/filetests/filetests/x64/i32_remu/zero_zero.wat
View File

@@ -11,11 +11,8 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: b900000000 mov ecx, 0
;; 9: b800000000 mov eax, 0
;; e: 83f900 cmp ecx, 0
;; 11: 0f8502000000 jne 0x19
;; 17: 0f0b ud2
;; 19: 31d2 xor edx, edx
;; 1b: f7f1 div ecx
;; 1d: 4889d0 mov rax, rdx
;; 20: 5d pop rbp
;; 21: c3 ret
;; e: 31d2 xor edx, edx
;; 10: f7f1 div ecx
;; 12: 4889d0 mov rax, rdx
;; 15: 5d pop rbp
;; 16: c3 ret

15
winch/filetests/filetests/x64/i64_divs/const.wat
View File

@@ -14,14 +14,7 @@
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4883f9ff cmp rcx, -1
;; 22: 0f8515000000 jne 0x3d
;; 28: 49bb0000000000000080
;; movabs r11, 0x8000000000000000
;; 32: 4c39d8 cmp rax, r11
;; 35: 0f8502000000 jne 0x3d
;; 3b: 0f0b ud2
;; 3d: 4899 cqo
;; 3f: 48f7f9 idiv rcx
;; 42: 5d pop rbp
;; 43: c3 ret
;; 1e: 4899 cqo
;; 20: 48f7f9 idiv rcx
;; 23: 5d pop rbp
;; 24: c3 ret

15
winch/filetests/filetests/x64/i64_divs/one_zero.wat
View File

@@ -14,14 +14,7 @@
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4883f9ff cmp rcx, -1
;; 22: 0f8515000000 jne 0x3d
;; 28: 49bb0000000000000080
;; movabs r11, 0x8000000000000000
;; 32: 4c39d8 cmp rax, r11
;; 35: 0f8502000000 jne 0x3d
;; 3b: 0f0b ud2
;; 3d: 4899 cqo
;; 3f: 48f7f9 idiv rcx
;; 42: 5d pop rbp
;; 43: c3 ret
;; 1e: 4899 cqo
;; 20: 48f7f9 idiv rcx
;; 23: 5d pop rbp
;; 24: c3 ret

15
winch/filetests/filetests/x64/i64_divs/overflow.wat
View File

@@ -15,14 +15,7 @@
;; 15: 4883f900 cmp rcx, 0
;; 19: 0f8502000000 jne 0x21
;; 1f: 0f0b ud2
;; 21: 4883f9ff cmp rcx, -1
;; 25: 0f8515000000 jne 0x40
;; 2b: 49bb0000000000000080
;; movabs r11, 0x8000000000000000
;; 35: 4c39d8 cmp rax, r11
;; 38: 0f8502000000 jne 0x40
;; 3e: 0f0b ud2
;; 40: 4899 cqo
;; 42: 48f7f9 idiv rcx
;; 45: 5d pop rbp
;; 46: c3 ret
;; 21: 4899 cqo
;; 23: 48f7f9 idiv rcx
;; 26: 5d pop rbp
;; 27: c3 ret

17
winch/filetests/filetests/x64/i64_divs/params.wat
View File

@@ -17,15 +17,8 @@
;; 1a: 4883f900 cmp rcx, 0
;; 1e: 0f8502000000 jne 0x26
;; 24: 0f0b ud2
;; 26: 4883f9ff cmp rcx, -1
;; 2a: 0f8515000000 jne 0x45
;; 30: 49bb0000000000000080
;; movabs r11, 0x8000000000000000
;; 3a: 4c39d8 cmp rax, r11
;; 3d: 0f8502000000 jne 0x45
;; 43: 0f0b ud2
;; 45: 4899 cqo
;; 47: 48f7f9 idiv rcx
;; 4a: 4883c410 add rsp, 0x10
;; 4e: 5d pop rbp
;; 4f: c3 ret
;; 26: 4899 cqo
;; 28: 48f7f9 idiv rcx
;; 2b: 4883c410 add rsp, 0x10
;; 2f: 5d pop rbp
;; 30: c3 ret

15
winch/filetests/filetests/x64/i64_divs/zero_zero.wat
View File

@@ -14,14 +14,7 @@
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4883f9ff cmp rcx, -1
;; 22: 0f8515000000 jne 0x3d
;; 28: 49bb0000000000000080
;; movabs r11, 0x8000000000000000
;; 32: 4c39d8 cmp rax, r11
;; 35: 0f8502000000 jne 0x3d
;; 3b: 0f0b ud2
;; 3d: 4899 cqo
;; 3f: 48f7f9 idiv rcx
;; 42: 5d pop rbp
;; 43: c3 ret
;; 1e: 4899 cqo
;; 20: 48f7f9 idiv rcx
;; 23: 5d pop rbp
;; 24: c3 ret

11
winch/filetests/filetests/x64/i64_divu/const.wat
View File

@@ -11,10 +11,7 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: 48c7c10a000000 mov rcx, 0xa
;; b: 48c7c014000000 mov rax, 0x14
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4831d2 xor rdx, rdx
;; 21: 48f7f1 div rcx
;; 24: 5d pop rbp
;; 25: c3 ret
;; 12: 4831d2 xor rdx, rdx
;; 15: 48f7f1 div rcx
;; 18: 5d pop rbp
;; 19: c3 ret

11
winch/filetests/filetests/x64/i64_divu/one_zero.wat
View File

@@ -11,10 +11,7 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: 48c7c100000000 mov rcx, 0
;; b: 48c7c001000000 mov rax, 1
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4831d2 xor rdx, rdx
;; 21: 48f7f1 div rcx
;; 24: 5d pop rbp
;; 25: c3 ret
;; 12: 4831d2 xor rdx, rdx
;; 15: 48f7f1 div rcx
;; 18: 5d pop rbp
;; 19: c3 ret

13
winch/filetests/filetests/x64/i64_divu/params.wat
View File

@@ -14,11 +14,8 @@
;; d: 48893424 mov qword ptr [rsp], rsi
;; 11: 488b0c24 mov rcx, qword ptr [rsp]
;; 15: 488b442408 mov rax, qword ptr [rsp + 8]
;; 1a: 4883f900 cmp rcx, 0
;; 1e: 0f8502000000 jne 0x26
;; 24: 0f0b ud2
;; 26: 4831d2 xor rdx, rdx
;; 29: 48f7f1 div rcx
;; 2c: 4883c410 add rsp, 0x10
;; 30: 5d pop rbp
;; 31: c3 ret
;; 1a: 4831d2 xor rdx, rdx
;; 1d: 48f7f1 div rcx
;; 20: 4883c410 add rsp, 0x10
;; 24: 5d pop rbp
;; 25: c3 ret

11
winch/filetests/filetests/x64/i64_divu/signed.wat
View File

@@ -11,10 +11,7 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: 48c7c1ffffffff mov rcx, 0xffffffffffffffff
;; b: 48c7c0ffffffff mov rax, 0xffffffffffffffff
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4831d2 xor rdx, rdx
;; 21: 48f7f1 div rcx
;; 24: 5d pop rbp
;; 25: c3 ret
;; 12: 4831d2 xor rdx, rdx
;; 15: 48f7f1 div rcx
;; 18: 5d pop rbp
;; 19: c3 ret

11
winch/filetests/filetests/x64/i64_divu/zero_zero.wat
View File

@@ -11,10 +11,7 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: 48c7c100000000 mov rcx, 0
;; b: 48c7c000000000 mov rax, 0
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4831d2 xor rdx, rdx
;; 21: 48f7f1 div rcx
;; 24: 5d pop rbp
;; 25: c3 ret
;; 12: 4831d2 xor rdx, rdx
;; 15: 48f7f1 div rcx
;; 18: 5d pop rbp
;; 19: c3 ret

21
winch/filetests/filetests/x64/i64_rems/const.wat
View File

@@ -11,15 +11,12 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: 48c7c105000000 mov rcx, 5
;; b: 48c7c007000000 mov rax, 7
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4899 cqo
;; 20: 4883f9ff cmp rcx, -1
;; 24: 0f850a000000 jne 0x34
;; 2a: ba00000000 mov edx, 0
;; 2f: e903000000 jmp 0x37
;; 34: 48f7f9 idiv rcx
;; 37: 4889d0 mov rax, rdx
;; 3a: 5d pop rbp
;; 3b: c3 ret
;; 12: 4899 cqo
;; 14: 4883f9ff cmp rcx, -1
;; 18: 0f850a000000 jne 0x28
;; 1e: ba00000000 mov edx, 0
;; 23: e903000000 jmp 0x2b
;; 28: 48f7f9 idiv rcx
;; 2b: 4889d0 mov rax, rdx
;; 2e: 5d pop rbp
;; 2f: c3 ret

21
winch/filetests/filetests/x64/i64_rems/one_zero.wat
View File

@@ -11,15 +11,12 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: 48c7c100000000 mov rcx, 0
;; b: 48c7c001000000 mov rax, 1
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4899 cqo
;; 20: 4883f9ff cmp rcx, -1
;; 24: 0f850a000000 jne 0x34
;; 2a: ba00000000 mov edx, 0
;; 2f: e903000000 jmp 0x37
;; 34: 48f7f9 idiv rcx
;; 37: 4889d0 mov rax, rdx
;; 3a: 5d pop rbp
;; 3b: c3 ret
;; 12: 4899 cqo
;; 14: 4883f9ff cmp rcx, -1
;; 18: 0f850a000000 jne 0x28
;; 1e: ba00000000 mov edx, 0
;; 23: e903000000 jmp 0x2b
;; 28: 48f7f9 idiv rcx
;; 2b: 4889d0 mov rax, rdx
;; 2e: 5d pop rbp
;; 2f: c3 ret

21
winch/filetests/filetests/x64/i64_rems/overflow.wat
View File

@@ -12,15 +12,12 @@
;; 4: 48c7c1ffffffff mov rcx, 0xffffffffffffffff
;; b: 48b80000000000000080
;; movabs rax, 0x8000000000000000
;; 15: 4883f900 cmp rcx, 0
;; 19: 0f8502000000 jne 0x21
;; 1f: 0f0b ud2
;; 21: 4899 cqo
;; 23: 4883f9ff cmp rcx, -1
;; 27: 0f850a000000 jne 0x37
;; 2d: ba00000000 mov edx, 0
;; 32: e903000000 jmp 0x3a
;; 37: 48f7f9 idiv rcx
;; 3a: 4889d0 mov rax, rdx
;; 3d: 5d pop rbp
;; 3e: c3 ret
;; 15: 4899 cqo
;; 17: 4883f9ff cmp rcx, -1
;; 1b: 0f850a000000 jne 0x2b
;; 21: ba00000000 mov edx, 0
;; 26: e903000000 jmp 0x2e
;; 2b: 48f7f9 idiv rcx
;; 2e: 4889d0 mov rax, rdx
;; 31: 5d pop rbp
;; 32: c3 ret

23
winch/filetests/filetests/x64/i64_rems/params.wat
View File

@@ -14,16 +14,13 @@
;; d: 48893424 mov qword ptr [rsp], rsi
;; 11: 488b0c24 mov rcx, qword ptr [rsp]
;; 15: 488b442408 mov rax, qword ptr [rsp + 8]
;; 1a: 4883f900 cmp rcx, 0
;; 1e: 0f8502000000 jne 0x26
;; 24: 0f0b ud2
;; 26: 4899 cqo
;; 28: 4883f9ff cmp rcx, -1
;; 2c: 0f850a000000 jne 0x3c
;; 32: ba00000000 mov edx, 0
;; 37: e903000000 jmp 0x3f
;; 3c: 48f7f9 idiv rcx
;; 3f: 4889d0 mov rax, rdx
;; 42: 4883c410 add rsp, 0x10
;; 46: 5d pop rbp
;; 47: c3 ret
;; 1a: 4899 cqo
;; 1c: 4883f9ff cmp rcx, -1
;; 20: 0f850a000000 jne 0x30
;; 26: ba00000000 mov edx, 0
;; 2b: e903000000 jmp 0x33
;; 30: 48f7f9 idiv rcx
;; 33: 4889d0 mov rax, rdx
;; 36: 4883c410 add rsp, 0x10
;; 3a: 5d pop rbp
;; 3b: c3 ret

21
winch/filetests/filetests/x64/i64_rems/zero_zero.wat
View File

@@ -11,15 +11,12 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: 48c7c100000000 mov rcx, 0
;; b: 48c7c000000000 mov rax, 0
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4899 cqo
;; 20: 4883f9ff cmp rcx, -1
;; 24: 0f850a000000 jne 0x34
;; 2a: ba00000000 mov edx, 0
;; 2f: e903000000 jmp 0x37
;; 34: 48f7f9 idiv rcx
;; 37: 4889d0 mov rax, rdx
;; 3a: 5d pop rbp
;; 3b: c3 ret
;; 12: 4899 cqo
;; 14: 4883f9ff cmp rcx, -1
;; 18: 0f850a000000 jne 0x28
;; 1e: ba00000000 mov edx, 0
;; 23: e903000000 jmp 0x2b
;; 28: 48f7f9 idiv rcx
;; 2b: 4889d0 mov rax, rdx
;; 2e: 5d pop rbp
;; 2f: c3 ret

13
winch/filetests/filetests/x64/i64_remu/const.wat
View File

@@ -11,11 +11,8 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: 48c7c105000000 mov rcx, 5
;; b: 48c7c007000000 mov rax, 7
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4831d2 xor rdx, rdx
;; 21: 48f7f1 div rcx
;; 24: 4889d0 mov rax, rdx
;; 27: 5d pop rbp
;; 28: c3 ret
;; 12: 4831d2 xor rdx, rdx
;; 15: 48f7f1 div rcx
;; 18: 4889d0 mov rax, rdx
;; 1b: 5d pop rbp
;; 1c: c3 ret

13
winch/filetests/filetests/x64/i64_remu/one_zero.wat
View File

@@ -11,11 +11,8 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: 48c7c100000000 mov rcx, 0
;; b: 48c7c001000000 mov rax, 1
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4831d2 xor rdx, rdx
;; 21: 48f7f1 div rcx
;; 24: 4889d0 mov rax, rdx
;; 27: 5d pop rbp
;; 28: c3 ret
;; 12: 4831d2 xor rdx, rdx
;; 15: 48f7f1 div rcx
;; 18: 4889d0 mov rax, rdx
;; 1b: 5d pop rbp
;; 1c: c3 ret

15
winch/filetests/filetests/x64/i64_remu/params.wat
View File

@@ -14,12 +14,9 @@
;; d: 48893424 mov qword ptr [rsp], rsi
;; 11: 488b0c24 mov rcx, qword ptr [rsp]
;; 15: 488b442408 mov rax, qword ptr [rsp + 8]
;; 1a: 4883f900 cmp rcx, 0
;; 1e: 0f8502000000 jne 0x26
;; 24: 0f0b ud2
;; 26: 4831d2 xor rdx, rdx
;; 29: 48f7f1 div rcx
;; 2c: 4889d0 mov rax, rdx
;; 2f: 4883c410 add rsp, 0x10
;; 33: 5d pop rbp
;; 34: c3 ret
;; 1a: 4831d2 xor rdx, rdx
;; 1d: 48f7f1 div rcx
;; 20: 4889d0 mov rax, rdx
;; 23: 4883c410 add rsp, 0x10
;; 27: 5d pop rbp
;; 28: c3 ret

13
winch/filetests/filetests/x64/i64_remu/signed.wat
View File

@@ -11,11 +11,8 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: 48c7c1ffffffff mov rcx, 0xffffffffffffffff
;; b: 48c7c0ffffffff mov rax, 0xffffffffffffffff
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4831d2 xor rdx, rdx
;; 21: 48f7f1 div rcx
;; 24: 4889d0 mov rax, rdx
;; 27: 5d pop rbp
;; 28: c3 ret
;; 12: 4831d2 xor rdx, rdx
;; 15: 48f7f1 div rcx
;; 18: 4889d0 mov rax, rdx
;; 1b: 5d pop rbp
;; 1c: c3 ret

13
winch/filetests/filetests/x64/i64_remu/zero_zero.wat
View File

@@ -11,11 +11,8 @@
;; 1: 4889e5 mov rbp, rsp
;; 4: 48c7c100000000 mov rcx, 0
;; b: 48c7c000000000 mov rax, 0
;; 12: 4883f900 cmp rcx, 0
;; 16: 0f8502000000 jne 0x1e
;; 1c: 0f0b ud2
;; 1e: 4831d2 xor rdx, rdx
;; 21: 48f7f1 div rcx
;; 24: 4889d0 mov rax, rdx
;; 27: 5d pop rbp
;; 28: c3 ret
;; 12: 4831d2 xor rdx, rdx
;; 15: 48f7f1 div rcx
;; 18: 4889d0 mov rax, rdx
;; 1b: 5d pop rbp
;; 1c: c3 ret