x64: Take SIGFPE signals for divide traps (#6026)
* x64: Take SIGFPE signals for divide traps Prior to this commit Wasmtime would configure `avoid_div_traps=true` unconditionally for Cranelift. This, for the division-based instructions, would change emitted code to explicitly trap on trap conditions instead of letting the `div` x86 instruction trap. There's no specific reason for Wasmtime, however, to specifically avoid traps in the `div` instruction. This means that the extra generated branches on x86 aren't necessary since the `div` and `idiv` instructions already trap for similar conditions as wasm requires. This commit instead disables the `avoid_div_traps` setting for Wasmtime's usage of Cranelift. Subsequently the codegen rules were updated slightly: * When `avoid_div_traps=true`, traps are no longer emitted for `div` instructions. * The `udiv`/`urem` instructions now list their trap as divide-by-zero instead of integer overflow. * The lowering for `sdiv` was updated to still explicitly check for zero but the integer overflow case is deferred to the instruction itself. * The lowering of `srem` no longer checks for zero and the listed trap for the `div` instruction is a divide-by-zero. This means that the codegen for `udiv` and `urem` no longer have any branches. The codegen for `sdiv` removes one branch but keeps the zero-check to differentiate the two kinds of traps. The codegen for `srem` removes one branch but keeps the -1 check since the semantics of `srem` mismatch with the semantics of `idiv` with a -1 divisor (specifically for INT_MIN). This is unlikely to have really all that much of a speedup but was something I noticed during #6008 which seemed like it'd be good to clean up. Plus Wasmtime's signal handling was already set up to catch `SIGFPE`, it was just never firing. * Remove the `avoid_div_traps` cranelift setting With no known users currently removing this should be possible and helps simplify the x64 backend. * x64: GC more support for avoid_div_traps Remove the `validate_sdiv_divisor*` pseudo-instructions and clean up some of the ISLE rules now that `div` is allowed to itself trap unconditionally. * x64: Store div trap code in instruction itself * Keep divisors in registers, not in memory Don't accidentally fold multiple traps together * Handle EXC_ARITHMETIC on macos * Update emit tests * Update winch and tests
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@@ -1,13 +1,8 @@
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test run
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set avoid_div_traps=false
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target aarch64
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target s390x
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target x86_64
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target riscv64
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; Tests that the `avoid_div_traps` flag prevents a trap when {s,u}rem is called
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; with INT_MIN % -1.
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target riscv64
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function %i8(i8, i8) -> i8 {
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block0(v0: i8, v1: i8):
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@@ -1,7 +1,5 @@
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test interpret
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test run
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; Test these inputs without div traps, it shouldn't affect normal inputs
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set avoid_div_traps
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target aarch64
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target s390x
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target x86_64
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@@ -4,11 +4,6 @@ target aarch64
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target s390x
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target x86_64
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target riscv64
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; Test these inputs without div traps, it shouldn't affect normal inputs
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set avoid_div_traps
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target aarch64
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target s390x
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target x86_64
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function %urem_i64(i64, i64) -> i64 {
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block0(v0: i64,v1: i64):
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