x64: Take SIGFPE signals for divide traps (#6026)
* x64: Take SIGFPE signals for divide traps Prior to this commit Wasmtime would configure `avoid_div_traps=true` unconditionally for Cranelift. This, for the division-based instructions, would change emitted code to explicitly trap on trap conditions instead of letting the `div` x86 instruction trap. There's no specific reason for Wasmtime, however, to specifically avoid traps in the `div` instruction. This means that the extra generated branches on x86 aren't necessary since the `div` and `idiv` instructions already trap for similar conditions as wasm requires. This commit instead disables the `avoid_div_traps` setting for Wasmtime's usage of Cranelift. Subsequently the codegen rules were updated slightly: * When `avoid_div_traps=true`, traps are no longer emitted for `div` instructions. * The `udiv`/`urem` instructions now list their trap as divide-by-zero instead of integer overflow. * The lowering for `sdiv` was updated to still explicitly check for zero but the integer overflow case is deferred to the instruction itself. * The lowering of `srem` no longer checks for zero and the listed trap for the `div` instruction is a divide-by-zero. This means that the codegen for `udiv` and `urem` no longer have any branches. The codegen for `sdiv` removes one branch but keeps the zero-check to differentiate the two kinds of traps. The codegen for `srem` removes one branch but keeps the -1 check since the semantics of `srem` mismatch with the semantics of `idiv` with a -1 divisor (specifically for INT_MIN). This is unlikely to have really all that much of a speedup but was something I noticed during #6008 which seemed like it'd be good to clean up. Plus Wasmtime's signal handling was already set up to catch `SIGFPE`, it was just never firing. * Remove the `avoid_div_traps` cranelift setting With no known users currently removing this should be possible and helps simplify the x64 backend. * x64: GC more support for avoid_div_traps Remove the `validate_sdiv_divisor*` pseudo-instructions and clean up some of the ISLE rules now that `div` is allowed to itself trap unconditionally. * x64: Store div trap code in instruction itself * Keep divisors in registers, not in memory Don't accidentally fold multiple traps together * Handle EXC_ARITHMETIC on macos * Update emit tests * Update winch and tests
This commit is contained in:
Alex Crichton
@@ -3503,13 +3503,20 @@
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;; Rules for `udiv` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; NB: a `RegMem` divisor, while allowed in the instruction encoding, isn't
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;; used right now to prevent a possibly-trapping load getting folded into the
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;; `div` instruction. Ideally non-trapping loads would get folded, however, or
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;; alternatively Wasmtime/Cranelift would grow support for multiple traps on
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;; a single opcode and the signal kind would differentiate at runtime.
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;; The inputs to the `div` instruction are different for 8-bit division so
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;; it needs a special case here since the instruction being crafted has a
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;; different shape.
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(rule 2 (lower (udiv a @ (value_type $I8) b))
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(x64_div8 (extend_to_gpr a $I32 (ExtendKind.Zero))
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(nonzero_divisor $I8 b)
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(DivSignedness.Unsigned)))
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(put_in_gpr b)
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(DivSignedness.Unsigned)
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(TrapCode.IntegerDivisionByZero)))
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;; 16-to-64-bit division is all done with a similar instruction and the only
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;; tricky requirement here is that when div traps are disallowed the divisor
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@@ -3517,29 +3524,40 @@
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(rule 1 (lower (udiv a @ (value_type (fits_in_64 ty)) b))
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(x64_div_quotient a
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(imm $I64 0)
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(nonzero_divisor ty b)
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(put_in_gpr b)
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(raw_operand_size_of_type ty)
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(DivSignedness.Unsigned)))
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(DivSignedness.Unsigned)
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(TrapCode.IntegerDivisionByZero)))
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;; Helper to place `Value` into a `Gpr` while possibly trapping if it's zero.
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;; Rules for `sdiv` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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(rule 2 (lower (sdiv a @ (value_type $I8) b))
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(x64_div8 (x64_sign_extend_data a (OperandSize.Size8))
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(nonzero_sdiv_divisor $I8 b)
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(DivSignedness.Signed)
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(TrapCode.IntegerOverflow)))
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(rule 1 (lower (sdiv a @ (value_type (fits_in_64 ty)) b))
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(let (
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(a Gpr a)
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(size OperandSize (raw_operand_size_of_type ty))
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)
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(x64_div_quotient a
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(x64_sign_extend_data a size)
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(nonzero_sdiv_divisor ty b)
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size
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(DivSignedness.Signed)
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(TrapCode.IntegerOverflow))))
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;; Checks to make sure that the input `Value` is a non-zero value for `sdiv`.
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;;
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;; If the `avoid_div_traps=true` codegen setting is specified then the value
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;; is checked for zero and a trap happens before the value is returned as a
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;; register here.
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(decl nonzero_divisor (Type Value) Gpr)
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;; As a special-case if the divisor is a constant number which is nonzero then
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;; no matter what there's no checks necessary.
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(rule 2 (nonzero_divisor ty (iconst (u64_from_imm64 (u64_nonzero n))))
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;; This is required to differentiate the divide-by-zero trap from the
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;; integer-overflow trap, the two trapping conditions of signed division.
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(decl nonzero_sdiv_divisor (Type Value) Reg)
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(rule 1 (nonzero_sdiv_divisor ty (iconst imm))
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(if-let n (safe_divisor_from_imm64 ty imm))
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(imm ty n))
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;; No checks necessary when `avoid_div_traps=false`
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(rule 1 (nonzero_divisor ty val)
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(if-let $false (avoid_div_traps))
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val)
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;; Base case traps if `val` is zero by using a `test` + `trap_if` combo
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(rule (nonzero_divisor ty val)
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(rule 0 (nonzero_sdiv_divisor ty val)
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(let (
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(val Reg val)
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(_ InstOutput (side_effect (with_flags_side_effect
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@@ -3548,64 +3566,26 @@
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)
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val))
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;; Rules for `sdiv` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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(rule 2 (lower (sdiv a @ (value_type $I8) b))
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(let (
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(a Gpr (x64_sign_extend_data a (OperandSize.Size8)))
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)
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(x64_div8 a (safe_sdiv_divisor $I8 a b) (DivSignedness.Signed))))
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(rule 1 (lower (sdiv a @ (value_type (fits_in_64 ty)) b))
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(let (
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(a Gpr a)
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(size OperandSize (raw_operand_size_of_type ty))
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(b Gpr (safe_sdiv_divisor ty a b))
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)
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(x64_div_quotient a (x64_sign_extend_data a size) b size (DivSignedness.Signed))))
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;; Similar to `nonzero_divisor` except this checks to make sure that the divisor
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;; provided as a `Value` is safe to divide into the dividend `Gpr` provided.
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(decl safe_sdiv_divisor (Type Gpr Value) Reg)
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;; If the divisor is a constant that isn't 0 or -1, then it's always safe so
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;; materialize it into a register.
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(rule 3 (safe_sdiv_divisor ty a (iconst imm))
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(if-let n (safe_divisor_from_imm64 ty imm))
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(imm ty n))
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;; With `avoid_div_traps=false` the divisor can be plumbed through.
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;;
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;; Note that CLIF semantics dictate that division-by-zero and INT_MIN/-1 both
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;; trap, but this matches the hardware semantics of `idiv` on x64 so they're
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;; fine to get plumbed through as-is.
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(rule 2 (safe_sdiv_divisor ty a b)
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(if-let $false (avoid_div_traps))
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b)
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;; The base cases here rely on some pseudo-instructions to do the checks to
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;; jump around with labels and such.
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(rule 1 (safe_sdiv_divisor $I64 a b) (validate_sdiv_divisor64 a b))
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(rule 0 (safe_sdiv_divisor ty a b) (validate_sdiv_divisor (raw_operand_size_of_type ty) a b))
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;; Rules for `urem` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; The remainder is in AH, so take the result of the division and right-shift
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;; by 8.
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(rule 2 (lower (urem a @ (value_type $I8) b))
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(let (
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(a Gpr (extend_to_gpr a $I32 (ExtendKind.Zero)))
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(b Gpr (nonzero_divisor $I8 b))
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(result Gpr (x64_div8 a b (DivSignedness.Unsigned)))
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(result Gpr (x64_div8 (extend_to_gpr a $I32 (ExtendKind.Zero))
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(put_in_gpr b) ;; see `udiv` for why not `gpr_mem`
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(DivSignedness.Unsigned)
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(TrapCode.IntegerDivisionByZero)))
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)
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(x64_shr $I64 result (Imm8Reg.Imm8 8))))
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(rule 1 (lower (urem a @ (value_type (fits_in_64 ty)) b))
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(x64_div_remainder a
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(imm $I64 0)
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(nonzero_divisor ty b)
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(put_in_gpr b) ;; see `udiv` for why not `gpr_mem`
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(raw_operand_size_of_type ty)
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(DivSignedness.Unsigned)))
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(DivSignedness.Unsigned)
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(TrapCode.IntegerDivisionByZero)))
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;; Rules for `srem` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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@@ -3618,7 +3598,7 @@
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(if-let n (safe_divisor_from_imm64 $I8 imm))
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(let (
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(a Gpr (x64_sign_extend_data a (OperandSize.Size8)))
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(result Gpr (x64_div8 a (imm $I8 n) (DivSignedness.Signed)))
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(result Gpr (x64_div8 a (imm $I8 n) (DivSignedness.Signed) (TrapCode.IntegerDivisionByZero)))
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)
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(x64_shr $I64 result (Imm8Reg.Imm8 8))))
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@@ -3633,19 +3613,18 @@
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(x64_sign_extend_data a size)
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(imm ty n)
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size
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(DivSignedness.Signed))))
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(DivSignedness.Signed)
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(TrapCode.IntegerDivisionByZero))))
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(rule 1 (lower (srem a @ (value_type $I8) b))
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(let (
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(a Gpr (x64_sign_extend_data a (OperandSize.Size8)))
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(b Gpr (nonzero_divisor $I8 b))
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)
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(x64_shr $I64 (x64_checked_srem_seq8 a b) (Imm8Reg.Imm8 8))))
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(rule (lower (srem a @ (value_type ty) b))
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(let (
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(a Gpr a)
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(b Gpr (nonzero_divisor ty b))
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(size OperandSize (raw_operand_size_of_type ty))
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(hi Gpr (x64_sign_extend_data a size))
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(tmp ValueRegs (x64_checked_srem_seq size a hi b))
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