cranelift: Port ineg scalar lowering to ISLE on x64

cranelift/codegen/src/isa/x64/inst.isle

@@ -72,6 +72,9 @@
             (Not (size OperandSize)
                  (src Reg)
                  (dst WritableReg))
+            (Neg (size OperandSize)
+                 (src Reg)
+                 (dst WritableReg))
             (LoadEffectiveAddress (addr SyntheticAmode)
                                   (dst WritableReg))))
 
@@ -1428,6 +1431,14 @@
             (_ Unit (emit (MInst.Not size src dst))))
         (writable_reg_to_reg dst)))
 
+;; Helper for creating `neg` instructions.
+(decl neg (Type Reg) Reg)
+(rule (neg ty src)
+      (let ((dst WritableReg (temp_writable_reg ty))
+            (size OperandSize (operand_size_of_type_32_64 ty))
+            (_ Unit (emit (MInst.Neg size src dst))))
+        (writable_reg_to_reg dst)))
+
 (decl lea (SyntheticAmode) Reg)
 (rule (lea addr)
       (let ((dst WritableReg (temp_writable_reg $I64))

cranelift/codegen/src/isa/x64/lower.isle

@@ -905,6 +905,11 @@
         (or_i128 (shr_i128 src_ amt_)
                  (shl_i128 src_ (sub $I64 (imm $I64 128) (RegMemImm.Reg amt_))))))
 
+;;;; Rules for `ineg` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+(rule (lower (has_type (fits_in_64 ty) (ineg x)))
+      (value_reg (neg ty (put_in_reg x))))
+
 ;;;; Rules for `avg_round` ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 (rule (lower (has_type (multi_lane 8 16)

cranelift/codegen/src/isa/x64/lower.rs

@@ -1268,9 +1268,7 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
                     dst,
                 ));
             } else {
-                let src = put_input_in_reg(ctx, inputs[0]);
+                implemented_in_isle(ctx);
-                ctx.emit(Inst::gen_move(dst, src, ty));
-                ctx.emit(Inst::neg(OperandSize::from_ty(ty), dst));
             }
         }
 

cranelift/codegen/src/isa/x64/lower/isle/generated_code.manifest

@@ -1,4 +1,4 @@
 src/clif.isle f176ef3bba99365
 src/prelude.isle 7b911d3b894ae17
-src/isa/x64/inst.isle 54ffef8c4f373807
+src/isa/x64/inst.isle 7c0c209f30946919
-src/isa/x64/lower.isle 28de5d6bf49c8471
+src/isa/x64/lower.isle 563fa026ec4ed363