cranelift: Port ineg scalar lowering to ISLE on x64

2022-01-13 15:08:01 -08:00
parent b78731839b
commit 5917f1d2c2
5 changed files with 296 additions and 255 deletions
--- a/cranelift/codegen/src/isa/x64/lower.rs
+++ b/cranelift/codegen/src/isa/x64/lower.rs
@@ -1268,9 +1268,7 @@ fn lower_insn_to_regs<C: LowerCtx<I = Inst>>(
                    dst,
                ));
            } else {
-                let src = put_input_in_reg(ctx, inputs[0]);
-                ctx.emit(Inst::gen_move(dst, src, ty));
-                ctx.emit(Inst::neg(OperandSize::from_ty(ty), dst));
+                implemented_in_isle(ctx);
            }
        }