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cranelift: Port ineg scalar lowering to ISLE on x64

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This commit is contained in:
Nick Fitzgerald
2022-01-13 15:08:01 -08:00
parent b78731839b
commit 5917f1d2c2
5 changed files with 296 additions and 255 deletions
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11
cranelift/codegen/src/isa/x64/inst.isle
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@@ -72,6 +72,9 @@
(Not (size OperandSize)
(src Reg)
(dst WritableReg))
(Neg (size OperandSize)
(src Reg)
(dst WritableReg))
(LoadEffectiveAddress (addr SyntheticAmode)
(dst WritableReg))))
@@ -1428,6 +1431,14 @@
(_ Unit (emit (MInst.Not size src dst))))
(writable_reg_to_reg dst)))
;; Helper for creating `neg` instructions.
(decl neg (Type Reg) Reg)
(rule (neg ty src)
(let ((dst WritableReg (temp_writable_reg ty))
(size OperandSize (operand_size_of_type_32_64 ty))
(_ Unit (emit (MInst.Neg size src dst))))
(writable_reg_to_reg dst)))
(decl lea (SyntheticAmode) Reg)
(rule (lea addr)
(let ((dst WritableReg (temp_writable_reg $I64))