Add Intel encodings for shift and rotate instructions.

This commit is contained in:
Jakob Stoklund Olesen
2017-07-12 12:53:41 -07:00
parent 3d738d01bb
commit 5615e4a9e7
4 changed files with 117 additions and 27 deletions

View File

@@ -1,7 +1,10 @@
; Test basic code generation for i32 arithmetic WebAssembly instructions.
test compile
set is_64bit
set is_64bit=0
isa intel
set is_64bit=1
isa intel
; Constants.
@@ -55,8 +58,32 @@ ebb0(v0: i32, v1: i32):
return v2
}
; function %i32_shl(i32, i32) -> i32
; function %i32_shr_s(i32, i32) -> i32
; function %i32_shr_u(i32, i32) -> i32
; function %i32_rotl(i32, i32) -> i32
; function %i32_rotr(i32, i32) -> i32
function %i32_shl(i32, i32) -> i32 {
ebb0(v0: i32, v1: i32):
v2 = ishl v0, v1
return v2
}
function %i32_shr_s(i32, i32) -> i32 {
ebb0(v0: i32, v1: i32):
v2 = sshr v0, v1
return v2
}
function %i32_shr_u(i32, i32) -> i32 {
ebb0(v0: i32, v1: i32):
v2 = ushr v0, v1
return v2
}
function %i32_rotl(i32, i32) -> i32 {
ebb0(v0: i32, v1: i32):
v2 = rotl v0, v1
return v2
}
function %i32_rotr(i32, i32) -> i32 {
ebb0(v0: i32, v1: i32):
v2 = rotr v0, v1
return v2
}