riscv64: Fix masking on iabs (#5505)

* cranelift: Add `iabs.i128` runtest

* riscv64: Fix incorrect extension in iabs

When lowering iabs, we were accidentally comparing the unextended value
this caused the instruction to misbehave with certain top bits.

This commit also adds a zbb lowering that does not use jumps.

cranelift/filetests/filetests/isa/riscv64/iabs-zbb.clif

@@ -0,0 +1,50 @@
+test compile precise-output
+target riscv64 has_zbb=true
+
+function %iabs_i8(i8) -> i8 {
+block0(v0: i8):
+    v1 = iabs v0
+    return v1
+}
+
+; block0:
+;   sext.b t2,a0
+;   sub a1,zero,t2
+;   max a0,t2,a1
+;   ret
+
+function %iabs_i16(i16) -> i16 {
+block0(v0: i16):
+    v1 = iabs v0
+    return v1
+}
+
+; block0:
+;   sext.h t2,a0
+;   sub a1,zero,t2
+;   max a0,t2,a1
+;   ret
+
+function %iabs_i32(i32) -> i32 {
+block0(v0: i32):
+    v1 = iabs v0
+    return v1
+}
+
+; block0:
+;   sext.w t2,a0
+;   sub a1,zero,t2
+;   max a0,t2,a1
+;   ret
+
+function %iabs_i64(i64) -> i64 {
+block0(v0: i64):
+    v1 = iabs v0
+    return v1
+}
+
+; block0:
+;   sub t2,zero,a0
+;   max a0,a0,t2
+;   ret
+

cranelift/filetests/filetests/isa/riscv64/iabs.clif

@@ -0,0 +1,50 @@
+test compile precise-output
+target riscv64 has_zbb=false
+
+function %iabs_i8(i8) -> i8 {
+block0(v0: i8):
+    v1 = iabs v0
+    return v1
+}
+
+; block0:
+;   sext.b t2,a0
+;   sub a1,zero,t2
+;   select_reg a0,t2,a1##condition=(t2 sgt a1)
+;   ret
+
+function %iabs_i16(i16) -> i16 {
+block0(v0: i16):
+    v1 = iabs v0
+    return v1
+}
+
+; block0:
+;   sext.h t2,a0
+;   sub a1,zero,t2
+;   select_reg a0,t2,a1##condition=(t2 sgt a1)
+;   ret
+
+function %iabs_i32(i32) -> i32 {
+block0(v0: i32):
+    v1 = iabs v0
+    return v1
+}
+
+; block0:
+;   sext.w t2,a0
+;   sub a1,zero,t2
+;   select_reg a0,t2,a1##condition=(t2 sgt a1)
+;   ret
+
+function %iabs_i64(i64) -> i64 {
+block0(v0: i64):
+    v1 = iabs v0
+    return v1
+}
+
+; block0:
+;   sub t2,zero,a0
+;   select_reg a0,a0,t2##condition=(a0 sgt t2)
+;   ret
+

cranelift/filetests/filetests/runtests/i128-iabs.clif

@@ -0,0 +1,13 @@
+test interpret
+test run
+target s390x
+
+function %iabs_i128(i128) -> i128 {
+block0(v0: i128):
+    v1 = iabs v0
+    return v1
+}
+; run: %iabs_i128(0) == 0
+; run: %iabs_i128(-1) == 1
+; run: %iabs_i128(1) == 1
+; run: %iabs_i128(0x80000000_00000000_00000000_00000000) == 0x80000000_00000000_00000000_00000000

cranelift/filetests/filetests/runtests/iabs.clif

@@ -2,7 +2,8 @@ test interpret
 test run
 target aarch64
 target s390x
-target riscv64
+target riscv64 has_zbb=false
+target riscv64 has_zbb=true
 ; x86_64 only supports vector iabs
 
 function %iabs_i8(i8) -> i8 {
@@ -44,3 +45,14 @@ block0(v0: i64):
 ; run: %iabs_i64(9223372036854775807) == 9223372036854775807
 ; run: %iabs_i64(-9223372036854775807) == 9223372036854775807
 ; run: %iabs_i64(-9223372036854775808) == -9223372036854775808
+
+
+; See issue #5501.
+; If iabs does not mask the high bits on the input, it can give an incorrect result.
+function %iabs_i16_mask(i16, i64) -> i16 system_v {
+block0(v0: i16, v1: i64):
+    v2 = ushr v0, v1
+    v3 = iabs v2
+    return v3
+}
+; run: %iabs_i16_mask(-24064, 16) == 24064