From 527b7a9b0594c6d9cc4b5c93db81871f356793a5 Mon Sep 17 00:00:00 2001
From: Andrew Brown <andrew.brown@intel.com>
Date: Tue, 3 May 2022 15:04:32 -0700
Subject: [PATCH] x64: add test for #3744 (#4095)

In #3744, we identified that extra `mov` instructions were inserted in
between the `cmov` instructions that CLIF's `select` lowers to. The
switch to regalloc2 resolved this and this test checks that no
intervening `mov`s are inserted. Closes #3744.
---
 .../filetests/isa/x64/select-issue-3744.clif     | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 cranelift/filetests/filetests/isa/x64/select-issue-3744.clif

diff --git a/cranelift/filetests/filetests/isa/x64/select-issue-3744.clif b/cranelift/filetests/filetests/isa/x64/select-issue-3744.clif
new file mode 100644
index 0000000000..251ea4583b
--- /dev/null
+++ b/cranelift/filetests/filetests/isa/x64/select-issue-3744.clif
@@ -0,0 +1,16 @@
+test compile
+target x86_64
+
+; Check that no intervening moves are inserted when lowering `select` (see
+; https://github.com/bytecodealliance/wasmtime/issues/3744).
+function %select_eq_f32(f32, f32) -> i32 {
+block0(v0: f32, v1: f32):
+    v2 = fcmp eq v0, v1
+    v3 = iconst.i32 1
+    v4 = iconst.i32 0
+    v5 = select v2, v3, v4
+    ; check: ucomiss %xmm0, %xmm1
+    ; nextln: cmovnzl %r8d, %eax, %eax
+    ; nextln: cmovpl  %r8d, %eax, %eax
+    return v5
+}