riscv64: Enable more instructions in the fuzzer (#6271)
These have been fixed in the past, and I've been forgeting to re-enable them.
This commit is contained in:
@@ -699,26 +699,21 @@ fn valid_for_target(triple: &Triple, op: Opcode, args: &[Type], rets: &[Type]) -
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(Opcode::Bswap),
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(Opcode::Bswap),
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// https://github.com/bytecodealliance/wasmtime/issues/5528
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// https://github.com/bytecodealliance/wasmtime/issues/5528
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(
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(
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Opcode::FcvtToUint
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Opcode::FcvtToUint | Opcode::FcvtToSint,
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| Opcode::FcvtToUintSat
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[F32 | F64],
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| Opcode::FcvtToSint
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&[I128]
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| Opcode::FcvtToSintSat,
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),
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(
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Opcode::FcvtToUintSat | Opcode::FcvtToSintSat,
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&[F32 | F64],
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&[F32 | F64],
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&[I8 | I16 | I128]
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&[I8 | I16 | I128]
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),
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),
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// https://github.com/bytecodealliance/wasmtime/issues/5528
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// https://github.com/bytecodealliance/wasmtime/issues/5528
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(
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(
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Opcode::FcvtFromUint | Opcode::FcvtFromSint,
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Opcode::FcvtFromUint | Opcode::FcvtFromSint,
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&[I8 | I16 | I128],
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&[I128],
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&[F32 | F64]
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&[F32 | F64]
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),
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),
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// TODO
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(
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Opcode::BandNot | Opcode::BorNot | Opcode::BxorNot,
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&([F32, F32] | [F64, F64])
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),
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// https://github.com/bytecodealliance/wasmtime/issues/5884
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(Opcode::AtomicRmw),
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)
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)
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}
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}
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