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[machinst x64]: lower remaining lane operations--any_true, all_true, splat

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This commit is contained in:
Andrew Brown
2020-09-29 14:42:53 -07:00
parent 4565582f02
commit 50b9399006
4 changed files with 165 additions and 5 deletions
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16
cranelift/codegen/src/isa/x64/inst/emit.rs
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@@ -2003,6 +2003,11 @@ pub(crate) fn emit(
sink.bind_label(constant_end_label);
}
Inst::XmmFakeDef { .. } => {
// This instruction format only exists to declare a register as a `def`; no code is
// emitted.
}
Inst::Xmm_Mov_R_M {
op,
src,
@@ -2087,19 +2092,20 @@ pub(crate) fn emit(
Inst::XMM_Cmp_RM_R { op, src, dst } => {
let rex = RexFlags::clear_w();
let (prefix, opcode) = match op {
SseOpcode::Ucomisd => (LegacyPrefixes::_66, 0x0F2E),
SseOpcode::Ucomiss => (LegacyPrefixes::None, 0x0F2E),
let (prefix, opcode, len) = match op {
SseOpcode::Ptest => (LegacyPrefixes::_66, 0x0F3817, 3),
SseOpcode::Ucomisd => (LegacyPrefixes::_66, 0x0F2E, 2),
SseOpcode::Ucomiss => (LegacyPrefixes::None, 0x0F2E, 2),
_ => unimplemented!("Emit xmm cmp rm r"),
};
match src {
RegMem::Reg { reg } => {
emit_std_reg_reg(sink, prefix, opcode, 2, *dst, *reg, rex);
emit_std_reg_reg(sink, prefix, opcode, len, *dst, *reg, rex);
}
RegMem::Mem { addr } => {
let addr = &addr.finalize(state);
emit_std_reg_mem(sink, prefix, opcode, 2, *dst, addr, rex);
emit_std_reg_mem(sink, prefix, opcode, len, *dst, addr, rex);
}
}
}