[x64] Add i64x2.abs

This instruction has a single instruction lowering in AVX512F/VL and a three instruction lowering in AVX but neither is currently supported in the x64 backend. To implement this, we instead subtract the vector from 0 and use a blending instruction to pick the lanes containing the absolute value.

cranelift/codegen/src/isa/x64/inst/emit_tests.rs

@@ -3426,6 +3426,12 @@ fn test_x64_emit() {
         "orps    %xmm5, %xmm4",
     ));
 
+    insns.push((
+        Inst::xmm_rm_r(SseOpcode::Blendvpd, RegMem::reg(xmm15), w_xmm4),
+        "66410F3815E7",
+        "blendvpd %xmm15, %xmm4",
+    ));
+
     // ========================================================
     // XMM_RM_R: Integer Packed