Align IntelGOTPCRel4 with R_X86_64_GOTPCREL.

Add an addend field to reloc_external, and use it to move the
responsibility for accounting for the difference between the end of an
instruction (where the PC is considered to be in PC-relative on intel)
and the beginning of the immediate field into the encoding code.

Specifically, this makes IntelGOTPCRel4 directly correspond to
R_X86_64_GOTPCREL, instead of also carrying an implicit `- 4`.

lib/cretonne/meta/isa/riscv/recipes.py

@@ -184,7 +184,8 @@ UJcall = EncRecipe(
         'UJcall', Call, size=4, ins=(), outs=(),
         emit='''
         sink.reloc_external(Reloc::RiscvCall,
-                            &func.dfg.ext_funcs[func_ref].name);
+                            &func.dfg.ext_funcs[func_ref].name,
+                            0);
         // rd=%x1 is the standard link register.
         put_uj(bits, 0, 1, sink);
         ''')