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Align IntelGOTPCRel4 with R_X86_64_GOTPCREL.

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Add an addend field to reloc_external, and use it to move the
responsibility for accounting for the difference between the end of an
instruction (where the PC is considered to be in PC-relative on intel)
and the beginning of the immediate field into the encoding code.

Specifically, this makes IntelGOTPCRel4 directly correspond to
R_X86_64_GOTPCREL, instead of also carrying an implicit `- 4`.
This commit is contained in:
Dan Gohman
2017-12-14 07:13:17 -06:00
parent 76e31cc1ad
commit 4f53cc1dad
7 changed files with 66 additions and 26 deletions
Download Patch File Download Diff File Expand all files Collapse all files

34
lib/cretonne/meta/isa/intel/recipes.py
View File

@@ -522,7 +522,8 @@ fnaddr4 = TailRecipe(
emit='''
PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
sink.reloc_external(Reloc::IntelAbs4,
&func.dfg.ext_funcs[func_ref].name);
&func.dfg.ext_funcs[func_ref].name,
0);
sink.put4(0);
''')
@@ -532,7 +533,8 @@ fnaddr8 = TailRecipe(
emit='''
PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
sink.reloc_external(Reloc::IntelAbs8,
&func.dfg.ext_funcs[func_ref].name);
&func.dfg.ext_funcs[func_ref].name,
0);
sink.put8(0);
''')
@@ -542,7 +544,8 @@ allones_fnaddr4 = TailRecipe(
emit='''
PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
sink.reloc_external(Reloc::IntelAbs4,
&func.dfg.ext_funcs[func_ref].name);
&func.dfg.ext_funcs[func_ref].name,
0);
// Write the immediate as `!0` for the benefit of BaldrMonkey.
sink.put4(!0);
''')
@@ -553,7 +556,8 @@ allones_fnaddr8 = TailRecipe(
emit='''
PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
sink.reloc_external(Reloc::IntelAbs8,
&func.dfg.ext_funcs[func_ref].name);
&func.dfg.ext_funcs[func_ref].name,
0);
// Write the immediate as `!0` for the benefit of BaldrMonkey.
sink.put8(!0);
''')
@@ -565,8 +569,11 @@ got_fnaddr8 = TailRecipe(
emit='''
PUT_OP(bits, rex2(0, out_reg0), sink);
modrm_riprel(out_reg0, sink);
// The addend adjusts for the difference between the end of the
// instruction and the beginning of the immediate field.
sink.reloc_external(Reloc::IntelGOTPCRel4,
&func.dfg.ext_funcs[func_ref].name);
&func.dfg.ext_funcs[func_ref].name,
-4);
sink.put4(0);
''')
@@ -577,7 +584,8 @@ gvaddr4 = TailRecipe(
emit='''
PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
sink.reloc_external(Reloc::IntelAbs4,
&func.global_vars[global_var].symbol_name());
&func.global_vars[global_var].symbol_name(),
0);
sink.put4(0);
''')
@@ -587,7 +595,8 @@ gvaddr8 = TailRecipe(
emit='''
PUT_OP(bits | (out_reg0 & 7), rex1(out_reg0), sink);
sink.reloc_external(Reloc::IntelAbs8,
&func.global_vars[global_var].symbol_name());
&func.global_vars[global_var].symbol_name(),
0);
sink.put8(0);
''')
@@ -597,8 +606,11 @@ got_gvaddr8 = TailRecipe(
emit='''
PUT_OP(bits, rex2(0, out_reg0), sink);
modrm_rm(5, out_reg0, sink);
// The addend adjusts for the difference between the end of the
// instruction and the beginning of the immediate field.
sink.reloc_external(Reloc::IntelGOTPCRel4,
&func.global_vars[global_var].symbol_name());
&func.global_vars[global_var].symbol_name(),
-4);
sink.put4(0);
''')
@@ -874,7 +886,8 @@ call_id = TailRecipe(
emit='''
PUT_OP(bits, BASE_REX, sink);
sink.reloc_external(Reloc::IntelPCRel4,
&func.dfg.ext_funcs[func_ref].name);
&func.dfg.ext_funcs[func_ref].name,
0);
sink.put4(0);
''')
@@ -883,7 +896,8 @@ call_plt_id = TailRecipe(
emit='''
PUT_OP(bits, BASE_REX, sink);
sink.reloc_external(Reloc::IntelPLTRel4,
&func.dfg.ext_funcs[func_ref].name);
&func.dfg.ext_funcs[func_ref].name,
0);
sink.put4(0);
''')

3
lib/cretonne/meta/isa/riscv/recipes.py
View File

@@ -184,7 +184,8 @@ UJcall = EncRecipe(
'UJcall', Call, size=4, ins=(), outs=(),
emit='''
sink.reloc_external(Reloc::RiscvCall,
&func.dfg.ext_funcs[func_ref].name);
&func.dfg.ext_funcs[func_ref].name,
0);
// rd=%x1 is the standard link register.
put_uj(bits, 0, 1, sink);
''')

8
lib/cretonne/src/binemit/memorysink.rs
View File

@@ -15,7 +15,7 @@
//! `CodeSink::put*` methods, so the performance impact of the virtual callbacks is less severe.
use ir::{ExternalName, JumpTable};
use super::{CodeSink, CodeOffset, Reloc};
use super::{CodeSink, CodeOffset, Reloc, Addend};
use std::ptr::write_unaligned;
/// A `CodeSink` that writes binary machine code directly into memory.
@@ -52,7 +52,7 @@ pub trait RelocSink {
fn reloc_ebb(&mut self, CodeOffset, Reloc, CodeOffset);
/// Add a relocation referencing an external symbol at the current offset.
fn reloc_external(&mut self, CodeOffset, Reloc, &ExternalName);
fn reloc_external(&mut self, CodeOffset, Reloc, &ExternalName, Addend);
/// Add a relocation referencing a jump table.
fn reloc_jt(&mut self, CodeOffset, Reloc, JumpTable);
@@ -96,9 +96,9 @@ impl<'a> CodeSink for MemoryCodeSink<'a> {
self.relocs.reloc_ebb(ofs, rel, ebb_offset);
}
fn reloc_external(&mut self, rel: Reloc, name: &ExternalName) {
fn reloc_external(&mut self, rel: Reloc, name: &ExternalName, addend: Addend) {
let ofs = self.offset();
self.relocs.reloc_external(ofs, rel, name);
self.relocs.reloc_external(ofs, rel, name, addend);
}
fn reloc_jt(&mut self, rel: Reloc, jt: JumpTable) {

7
lib/cretonne/src/binemit/mod.rs
View File

@@ -19,6 +19,9 @@ use std::fmt;
/// depends on the *host* platform, not the *target* platform.
pub type CodeOffset = u32;
/// Addend to add to the symbol value.
pub type Addend = i64;
/// Relocation kinds for every ISA
#[derive(Debug)]
pub enum Reloc {
@@ -78,8 +81,8 @@ pub trait CodeSink {
/// Add a relocation referencing an EBB at the current offset.
fn reloc_ebb(&mut self, Reloc, CodeOffset);
/// Add a relocation referencing an external symbol at the current offset.
fn reloc_external(&mut self, Reloc, &ExternalName);
/// Add a relocation referencing an external symbol plus the addend at the current offset.
fn reloc_external(&mut self, Reloc, &ExternalName, Addend);
/// Add a relocation referencing a jump table.
fn reloc_jt(&mut self, Reloc, JumpTable);