Use the target-lexicon crate.

This switches from a custom list of architectures to use the
target-lexicon crate.

 - "set is_64bit=1; isa x86" is replaced with "target x86_64", and
   similar for other architectures, and the `is_64bit` flag is removed
   entirely.

 - The `is_compressed` flag is removed too; it's no longer being used to
   control REX prefixes on x86-64, ARM and Thumb are separate
   architectures in target-lexicon, and we can figure out how to
   select RISC-V compressed encodings when we're ready.

lib/codegen/src/regalloc/pressure.rs

@@ -275,6 +275,8 @@ mod tests {
     use regalloc::RegisterSet;
     use std::borrow::Borrow;
     use std::boxed::Box;
+    use std::str::FromStr;
+    use target_lexicon;
 
     // Make an arm32 `TargetIsa`, if possible.
     fn arm32() -> Option<Box<TargetIsa>> {
@@ -284,7 +286,9 @@ mod tests {
         let shared_builder = settings::builder();
         let shared_flags = settings::Flags::new(shared_builder);
 
-        isa::lookup("arm32").ok().map(|b| b.finish(shared_flags))
+        isa::lookup(triple!("arm"))
+            .ok()
+            .map(|b| b.finish(shared_flags))
     }
 
     // Get a register class by name.