Use the target-lexicon crate.

This switches from a custom list of architectures to use the
target-lexicon crate.

 - "set is_64bit=1; isa x86" is replaced with "target x86_64", and
   similar for other architectures, and the `is_64bit` flag is removed
   entirely.

 - The `is_compressed` flag is removed too; it's no longer being used to
   control REX prefixes on x86-64, ARM and Thumb are separate
   architectures in target-lexicon, and we can figure out how to
   select RISC-V compressed encodings when we're ready.

lib/codegen/src/isa/arm32/mod.rs

@@ -15,32 +15,43 @@ use isa::{EncInfo, RegClass, RegInfo, TargetIsa};
 use regalloc;
 use std::boxed::Box;
 use std::fmt;
+use target_lexicon::{Architecture, Triple};
 
 #[allow(dead_code)]
 struct Isa {
+    triple: Triple,
     shared_flags: shared_settings::Flags,
     isa_flags: settings::Flags,
     cpumode: &'static [shared_enc_tables::Level1Entry<u16>],
 }
 
 /// Get an ISA builder for creating ARM32 targets.
-pub fn isa_builder() -> IsaBuilder {
+pub fn isa_builder(triple: Triple) -> IsaBuilder {
     IsaBuilder {
+        triple,
         setup: settings::builder(),
         constructor: isa_constructor,
     }
 }
 
 fn isa_constructor(
+    triple: Triple,
     shared_flags: shared_settings::Flags,
     builder: shared_settings::Builder,
 ) -> Box<TargetIsa> {
-    let level1 = if shared_flags.is_compressed() {
-        &enc_tables::LEVEL1_T32[..]
-    } else {
-        &enc_tables::LEVEL1_A32[..]
+    let level1 = match triple.architecture {
+        Architecture::Thumbv6m | Architecture::Thumbv7em | Architecture::Thumbv7m => {
+            &enc_tables::LEVEL1_T32[..]
+        }
+        Architecture::Arm
+        | Architecture::Armv4t
+        | Architecture::Armv5te
+        | Architecture::Armv7
+        | Architecture::Armv7s => &enc_tables::LEVEL1_A32[..],
+        _ => panic!(),
     };
     Box::new(Isa {
+        triple,
         isa_flags: settings::Flags::new(&shared_flags, builder),
         shared_flags,
         cpumode: level1,
@@ -52,6 +63,10 @@ impl TargetIsa for Isa {
         "arm32"
     }
 
+    fn triple(&self) -> &Triple {
+        &self.triple
+    }
+
     fn flags(&self) -> &shared_settings::Flags {
         &self.shared_flags
     }