Use the target-lexicon crate.

This switches from a custom list of architectures to use the
target-lexicon crate.

 - "set is_64bit=1; isa x86" is replaced with "target x86_64", and
   similar for other architectures, and the `is_64bit` flag is removed
   entirely.

 - The `is_compressed` flag is removed too; it's no longer being used to
   control REX prefixes on x86-64, ARM and Thumb are separate
   architectures in target-lexicon, and we can figure out how to
   select RISC-V compressed encodings when we're ready.
This commit is contained in:
Dan Gohman
2018-05-25 11:41:14 -07:00
parent 2f3008aa40
commit 4e67e08efd
131 changed files with 487 additions and 499 deletions

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@@ -1,11 +1,9 @@
; Test basic code generation for control flow WebAssembly instructions.
test compile
set is_64bit=0
isa x86 haswell
target i686 haswell
set is_64bit=1
isa x86 haswell
target x86_64 haswell
function %br_if(i32) -> i32 {
ebb0(v0: i32):

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@@ -1,8 +1,7 @@
; Test code generation for WebAssembly type conversion operators.
test compile
set is_64bit=1
isa x86 haswell
target x86_64 haswell
function %i32_wrap_i64(i64) -> i32 {
ebb0(v0: i64):

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@@ -1,17 +1,10 @@
; Test basic code generation for f32 arithmetic WebAssembly instructions.
test compile
set is_64bit=0
isa x86 haswell
set is_64bit=0
isa x86 baseline
set is_64bit=1
isa x86 haswell
set is_64bit=1
isa x86 baseline
target i686 haswell
target i686 baseline
target x86_64 haswell
target x86_64 baseline
; Constants.

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@@ -1,11 +1,9 @@
; Test code generation for WebAssembly f32 comparison operators.
test compile
set is_64bit=0
isa x86 haswell
target i686 haswell
set is_64bit=1
isa x86 haswell
target x86_64 haswell
function %f32_eq(f32, f32) -> i32 {
ebb0(v0: f32, v1: f32):

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@@ -3,8 +3,7 @@ test compile
; We only test on 64-bit since the heap_addr instructions and vmctx parameters
; explicitly mention the pointer width.
set is_64bit=1
isa x86 haswell
target x86_64 haswell
function %f32_load(i32, i64 vmctx) -> f32 {
gv0 = vmctx

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@@ -1,11 +1,8 @@
; Test basic code generation for f64 arithmetic WebAssembly instructions.
test compile
set is_64bit=1
isa x86 haswell
set is_64bit=1
isa x86 baseline
target x86_64 haswell
target x86_64 baseline
; Constants.

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@@ -1,11 +1,9 @@
; Test code generation for WebAssembly f64 comparison operators.
test compile
set is_64bit=0
isa x86 haswell
target i686 haswell
set is_64bit=1
isa x86 haswell
target x86_64 haswell
function %f64_eq(f64, f64) -> i32 {
ebb0(v0: f64, v1: f64):

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@@ -3,8 +3,7 @@ test compile
; We only test on 64-bit since the heap_addr instructions and vmctx parameters
; explicitly mention the pointer width.
set is_64bit=1
isa x86 haswell
target x86_64 haswell
function %f64_load(i32, i64 vmctx) -> f64 {
gv0 = vmctx

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@@ -1,17 +1,10 @@
; Test basic code generation for i32 arithmetic WebAssembly instructions.
test compile
set is_64bit=0
isa x86 haswell
set is_64bit=0
isa x86 baseline
set is_64bit=1
isa x86 haswell
set is_64bit=1
isa x86 baseline
target i686 haswell
target i686 baseline
target x86_64 haswell
target x86_64 baseline
; Constants.

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@@ -1,11 +1,9 @@
; Test code generation for WebAssembly i32 comparison operators.
test compile
set is_64bit=0
isa x86 haswell
target i686 haswell
set is_64bit=1
isa x86 haswell
target x86_64 haswell
function %i32_eqz(i32) -> i32 {
ebb0(v0: i32):

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@@ -3,8 +3,7 @@ test compile
; We only test on 64-bit since the heap_addr instructions and vmctx parameters
; explicitly mention the pointer width.
set is_64bit=1
isa x86 haswell
target x86_64 haswell
function %i32_load(i32, i64 vmctx) -> i32 {
gv0 = vmctx

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@@ -1,11 +1,8 @@
; Test basic code generation for i64 arithmetic WebAssembly instructions.
test compile
set is_64bit=1
isa x86 haswell
set is_64bit=1
isa x86 baseline
target x86_64 haswell
target x86_64 baseline
; Constants.

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@@ -1,8 +1,7 @@
; Test code generation for WebAssembly i64 comparison operators.
test compile
set is_64bit=1
isa x86 haswell
target x86_64 haswell
function %i64_eqz(i64) -> i32 {
ebb0(v0: i64):

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@@ -3,8 +3,7 @@ test compile
; We only test on 64-bit since the heap_addr instructions and vmctx parameters
; explicitly mention the pointer width.
set is_64bit=1
isa x86 haswell
target x86_64 haswell
function %i64_load(i32, i64 vmctx) -> i64 {
gv0 = vmctx

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@@ -1,11 +1,9 @@
; Test basic code generation for the select WebAssembly instruction.
test compile
set is_64bit=0
isa x86 haswell
target i686 haswell
set is_64bit=1
isa x86 haswell
target x86_64 haswell
function %select_i32(i32, i32, i32) -> i32 {
ebb0(v0: i32, v1: i32, v2: i32):