Add icmp_imm encodings for RISC-V.
The ISA has icmp_imm slt/ult with 12-bit signed immediate operands.
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@@ -5,7 +5,8 @@ from __future__ import absolute_import
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from base import instructions as base
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from base.immediates import intcc
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from .defs import RV32, RV64
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from .recipes import OPIMM, OPIMM32, OP, OP32, JALR, R, Rshamt, Ricmp, I, Iret
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from .recipes import OPIMM, OPIMM32, OP, OP32
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from .recipes import JALR, R, Rshamt, Ricmp, I, Iicmp, Iret
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from .settings import use_m
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from cdsl.ast import Var
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@@ -60,6 +61,11 @@ RV64.enc(base.icmp.i64(intcc.slt, x, y), Ricmp, OP(0b010, 0b0000000))
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RV32.enc(base.icmp.i32(intcc.ult, x, y), Ricmp, OP(0b011, 0b0000000))
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RV64.enc(base.icmp.i64(intcc.ult, x, y), Ricmp, OP(0b011, 0b0000000))
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RV32.enc(base.icmp_imm.i32(intcc.slt, x, y), Iicmp, OPIMM(0b010))
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RV64.enc(base.icmp_imm.i64(intcc.slt, x, y), Iicmp, OPIMM(0b010))
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RV32.enc(base.icmp_imm.i32(intcc.ult, x, y), Iicmp, OPIMM(0b011))
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RV64.enc(base.icmp_imm.i64(intcc.ult, x, y), Iicmp, OPIMM(0b011))
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# "M" Standard Extension for Integer Multiplication and Division.
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# Gated by the `use_m` flag.
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RV32.enc(base.imul.i32, R, OP(0b000, 0b0000001), isap=use_m)
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