cranelift-codegen: move old x86 and RISC-V backends to isa/legacy/.
These backends will be removed in the future (see bytecodealliance/rfcs#12 and the pending #3009 in this repo). In the meantime, to more clearly communicate that they are using "legacy" APIs and will eventually be removed, this PR places them in an `isa/legacy/` subdirectory. No functional changes otherwise.
This commit is contained in:
Chris Fallin
235
cranelift/codegen/src/isa/legacy/x86/unwind/systemv.rs
Normal file
235
cranelift/codegen/src/isa/legacy/x86/unwind/systemv.rs
Normal file
@@ -0,0 +1,235 @@
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//! Unwind information for System V ABI (x86-64).
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use crate::ir::Function;
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use crate::isa::{
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unwind::systemv::{RegisterMappingError, UnwindInfo},
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RegUnit, TargetIsa,
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};
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use crate::result::CodegenResult;
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use gimli::{write::CommonInformationEntry, Encoding, Format, Register, X86_64};
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/// Creates a new x86-64 common information entry (CIE).
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pub fn create_cie() -> CommonInformationEntry {
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use gimli::write::CallFrameInstruction;
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let mut entry = CommonInformationEntry::new(
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Encoding {
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address_size: 8,
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format: Format::Dwarf32,
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version: 1,
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},
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1, // Code alignment factor
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-8, // Data alignment factor
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X86_64::RA,
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);
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// Every frame will start with the call frame address (CFA) at RSP+8
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// It is +8 to account for the push of the return address by the call instruction
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entry.add_instruction(CallFrameInstruction::Cfa(X86_64::RSP, 8));
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// Every frame will start with the return address at RSP (CFA-8 = RSP+8-8 = RSP)
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entry.add_instruction(CallFrameInstruction::Offset(X86_64::RA, -8));
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entry
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}
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/// Map Cranelift registers to their corresponding Gimli registers.
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pub fn map_reg(isa: &dyn TargetIsa, reg: RegUnit) -> Result<Register, RegisterMappingError> {
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if isa.name() != "x86" || isa.pointer_bits() != 64 {
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return Err(RegisterMappingError::UnsupportedArchitecture);
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}
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// Mapping from https://github.com/bytecodealliance/cranelift/pull/902 by @iximeow
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const X86_GP_REG_MAP: [gimli::Register; 16] = [
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X86_64::RAX,
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X86_64::RCX,
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X86_64::RDX,
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X86_64::RBX,
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X86_64::RSP,
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X86_64::RBP,
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X86_64::RSI,
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X86_64::RDI,
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X86_64::R8,
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X86_64::R9,
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X86_64::R10,
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X86_64::R11,
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X86_64::R12,
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X86_64::R13,
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X86_64::R14,
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X86_64::R15,
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];
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const X86_XMM_REG_MAP: [gimli::Register; 16] = [
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X86_64::XMM0,
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X86_64::XMM1,
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X86_64::XMM2,
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X86_64::XMM3,
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X86_64::XMM4,
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X86_64::XMM5,
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X86_64::XMM6,
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X86_64::XMM7,
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X86_64::XMM8,
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X86_64::XMM9,
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X86_64::XMM10,
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X86_64::XMM11,
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X86_64::XMM12,
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X86_64::XMM13,
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X86_64::XMM14,
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X86_64::XMM15,
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];
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let reg_info = isa.register_info();
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let bank = reg_info
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.bank_containing_regunit(reg)
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.ok_or_else(|| RegisterMappingError::MissingBank)?;
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match bank.name {
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"IntRegs" => {
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// x86 GP registers have a weird mapping to DWARF registers, so we use a
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// lookup table.
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Ok(X86_GP_REG_MAP[(reg - bank.first_unit) as usize])
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}
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"FloatRegs" => Ok(X86_XMM_REG_MAP[(reg - bank.first_unit) as usize]),
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_ => Err(RegisterMappingError::UnsupportedRegisterBank(bank.name)),
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}
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}
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pub(crate) fn create_unwind_info(
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func: &Function,
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isa: &dyn TargetIsa,
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) -> CodegenResult<Option<UnwindInfo>> {
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// Only System V-like calling conventions are supported
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match isa.unwind_info_kind() {
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crate::machinst::UnwindInfoKind::SystemV => {}
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_ => return Ok(None),
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}
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if func.prologue_end.is_none() || isa.name() != "x86" || isa.pointer_bits() != 64 {
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return Ok(None);
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}
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let unwind = match super::create_unwind_info(func, isa)? {
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Some(u) => u,
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None => {
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return Ok(None);
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}
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};
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struct RegisterMapper<'a, 'b>(&'a (dyn TargetIsa + 'b));
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impl<'a, 'b> crate::isa::unwind::systemv::RegisterMapper<RegUnit> for RegisterMapper<'a, 'b> {
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fn map(&self, reg: RegUnit) -> Result<u16, RegisterMappingError> {
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Ok(map_reg(self.0, reg)?.0)
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}
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fn sp(&self) -> u16 {
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X86_64::RSP.0
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}
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fn fp(&self) -> Option<u16> {
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Some(X86_64::RBP.0)
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}
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}
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let map = RegisterMapper(isa);
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Ok(Some(UnwindInfo::build(unwind, &map)?))
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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use crate::cursor::{Cursor, FuncCursor};
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use crate::ir::{
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types, AbiParam, ExternalName, InstBuilder, Signature, StackSlotData, StackSlotKind,
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};
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use crate::isa::{lookup_variant, BackendVariant, CallConv};
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use crate::settings::{builder, Flags};
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use crate::Context;
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use gimli::write::Address;
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use std::str::FromStr;
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use target_lexicon::triple;
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#[test]
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fn test_simple_func() {
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let isa = lookup_variant(triple!("x86_64"), BackendVariant::Legacy)
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.expect("expect x86 ISA")
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.finish(Flags::new(builder()));
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let mut context = Context::for_function(create_function(
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CallConv::SystemV,
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Some(StackSlotData::new(StackSlotKind::ExplicitSlot, 64)),
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));
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context.compile(&*isa).expect("expected compilation");
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let fde = match isa
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.create_unwind_info(&context.func)
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.expect("can create unwind info")
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{
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Some(crate::isa::unwind::UnwindInfo::SystemV(info)) => {
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info.to_fde(Address::Constant(1234))
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}
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_ => panic!("expected unwind information"),
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};
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assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(1234), length: 16, lsda: None, instructions: [(2, CfaOffset(16)), (2, Offset(Register(6), -16)), (5, CfaRegister(Register(6))), (15, SameValue(Register(6))), (15, Cfa(Register(7), 8))] }");
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}
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fn create_function(call_conv: CallConv, stack_slot: Option<StackSlotData>) -> Function {
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let mut func =
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Function::with_name_signature(ExternalName::user(0, 0), Signature::new(call_conv));
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let block0 = func.dfg.make_block();
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let mut pos = FuncCursor::new(&mut func);
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pos.insert_block(block0);
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pos.ins().return_(&[]);
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if let Some(stack_slot) = stack_slot {
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func.stack_slots.push(stack_slot);
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}
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func
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}
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#[test]
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fn test_multi_return_func() {
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let isa = lookup_variant(triple!("x86_64"), BackendVariant::Legacy)
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.expect("expect x86 ISA")
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.finish(Flags::new(builder()));
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let mut context = Context::for_function(create_multi_return_function(CallConv::SystemV));
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context.compile(&*isa).expect("expected compilation");
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let fde = match isa
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.create_unwind_info(&context.func)
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.expect("can create unwind info")
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{
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Some(crate::isa::unwind::UnwindInfo::SystemV(info)) => {
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info.to_fde(Address::Constant(4321))
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}
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_ => panic!("expected unwind information"),
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};
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assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(4321), length: 16, lsda: None, instructions: [(2, CfaOffset(16)), (2, Offset(Register(6), -16)), (5, CfaRegister(Register(6))), (12, RememberState), (12, SameValue(Register(6))), (12, Cfa(Register(7), 8)), (13, RestoreState), (15, SameValue(Register(6))), (15, Cfa(Register(7), 8))] }");
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}
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fn create_multi_return_function(call_conv: CallConv) -> Function {
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let mut sig = Signature::new(call_conv);
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sig.params.push(AbiParam::new(types::I32));
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let mut func = Function::with_name_signature(ExternalName::user(0, 0), sig);
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let block0 = func.dfg.make_block();
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let v0 = func.dfg.append_block_param(block0, types::I32);
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let block1 = func.dfg.make_block();
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let block2 = func.dfg.make_block();
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let mut pos = FuncCursor::new(&mut func);
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pos.insert_block(block0);
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pos.ins().brnz(v0, block2, &[]);
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pos.ins().jump(block1, &[]);
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pos.insert_block(block1);
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pos.ins().return_(&[]);
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pos.insert_block(block2);
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pos.ins().return_(&[]);
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func
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}
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}
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265
cranelift/codegen/src/isa/legacy/x86/unwind/winx64.rs
Normal file
265
cranelift/codegen/src/isa/legacy/x86/unwind/winx64.rs
Normal file
@@ -0,0 +1,265 @@
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//! Unwind information for Windows x64 ABI.
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use crate::ir::Function;
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use crate::isa::x86::registers::{FPR, GPR};
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use crate::isa::{unwind::winx64::UnwindInfo, RegUnit, TargetIsa};
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use crate::result::CodegenResult;
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pub(crate) fn create_unwind_info(
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func: &Function,
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isa: &dyn TargetIsa,
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) -> CodegenResult<Option<UnwindInfo>> {
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// Only Windows fastcall is supported for unwind information
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if !func.signature.call_conv.extends_windows_fastcall() || func.prologue_end.is_none() {
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return Ok(None);
|
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}
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let unwind = match super::create_unwind_info(func, isa)? {
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Some(u) => u,
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None => {
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return Ok(None);
|
||||
}
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};
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Ok(Some(UnwindInfo::build::<RegUnit, RegisterMapper>(unwind)?))
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}
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struct RegisterMapper;
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impl crate::isa::unwind::winx64::RegisterMapper<RegUnit> for RegisterMapper {
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fn map(reg: RegUnit) -> crate::isa::unwind::winx64::MappedRegister {
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use crate::isa::unwind::winx64::MappedRegister;
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if GPR.contains(reg) {
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MappedRegister::Int(GPR.index_of(reg) as u8)
|
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} else if FPR.contains(reg) {
|
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MappedRegister::Xmm(reg as u8)
|
||||
} else {
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panic!()
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||||
}
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||||
}
|
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}
|
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|
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#[cfg(test)]
|
||||
mod tests {
|
||||
use super::*;
|
||||
use crate::cursor::{Cursor, FuncCursor};
|
||||
use crate::ir::{ExternalName, InstBuilder, Signature, StackSlotData, StackSlotKind};
|
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use crate::isa::unwind::winx64::UnwindCode;
|
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use crate::isa::x86::registers::RU;
|
||||
use crate::isa::{lookup_variant, BackendVariant, CallConv};
|
||||
use crate::settings::{builder, Flags};
|
||||
use crate::Context;
|
||||
use std::str::FromStr;
|
||||
use target_lexicon::triple;
|
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|
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#[test]
|
||||
fn test_wrong_calling_convention() {
|
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let isa = lookup_variant(triple!("x86_64"), BackendVariant::Legacy)
|
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.expect("expect x86 ISA")
|
||||
.finish(Flags::new(builder()));
|
||||
|
||||
let mut context = Context::for_function(create_function(CallConv::SystemV, None));
|
||||
|
||||
context.compile(&*isa).expect("expected compilation");
|
||||
|
||||
assert_eq!(
|
||||
create_unwind_info(&context.func, &*isa).expect("can create unwind info"),
|
||||
None
|
||||
);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_small_alloc() {
|
||||
let isa = lookup_variant(triple!("x86_64"), BackendVariant::Legacy)
|
||||
.expect("expect x86 ISA")
|
||||
.finish(Flags::new(builder()));
|
||||
|
||||
let mut context = Context::for_function(create_function(
|
||||
CallConv::WindowsFastcall,
|
||||
Some(StackSlotData::new(StackSlotKind::ExplicitSlot, 64)),
|
||||
));
|
||||
|
||||
context.compile(&*isa).expect("expected compilation");
|
||||
|
||||
let unwind = create_unwind_info(&context.func, &*isa)
|
||||
.expect("can create unwind info")
|
||||
.expect("expected unwind info");
|
||||
|
||||
assert_eq!(
|
||||
unwind,
|
||||
UnwindInfo {
|
||||
flags: 0,
|
||||
prologue_size: 9,
|
||||
frame_register: None,
|
||||
frame_register_offset: 0,
|
||||
unwind_codes: vec![
|
||||
UnwindCode::PushRegister {
|
||||
instruction_offset: 2,
|
||||
reg: GPR.index_of(RU::rbp.into()) as u8
|
||||
},
|
||||
UnwindCode::StackAlloc {
|
||||
instruction_offset: 9,
|
||||
size: 64
|
||||
}
|
||||
]
|
||||
}
|
||||
);
|
||||
|
||||
assert_eq!(unwind.emit_size(), 8);
|
||||
|
||||
let mut buf = [0u8; 8];
|
||||
unwind.emit(&mut buf);
|
||||
|
||||
assert_eq!(
|
||||
buf,
|
||||
[
|
||||
0x01, // Version and flags (version 1, no flags)
|
||||
0x09, // Prologue size
|
||||
0x02, // Unwind code count (1 for stack alloc, 1 for push reg)
|
||||
0x00, // Frame register + offset (no frame register)
|
||||
0x09, // Prolog offset
|
||||
0x72, // Operation 2 (small stack alloc), size = 0xB slots (e.g. (0x7 * 8) + 8 = 64 bytes)
|
||||
0x02, // Prolog offset
|
||||
0x50, // Operation 0 (save nonvolatile register), reg = 5 (RBP)
|
||||
]
|
||||
);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_medium_alloc() {
|
||||
let isa = lookup_variant(triple!("x86_64"), BackendVariant::Legacy)
|
||||
.expect("expect x86 ISA")
|
||||
.finish(Flags::new(builder()));
|
||||
|
||||
let mut context = Context::for_function(create_function(
|
||||
CallConv::WindowsFastcall,
|
||||
Some(StackSlotData::new(StackSlotKind::ExplicitSlot, 10000)),
|
||||
));
|
||||
|
||||
context.compile(&*isa).expect("expected compilation");
|
||||
|
||||
let unwind = create_unwind_info(&context.func, &*isa)
|
||||
.expect("can create unwind info")
|
||||
.expect("expected unwind info");
|
||||
|
||||
assert_eq!(
|
||||
unwind,
|
||||
UnwindInfo {
|
||||
flags: 0,
|
||||
prologue_size: 27,
|
||||
frame_register: None,
|
||||
frame_register_offset: 0,
|
||||
unwind_codes: vec![
|
||||
UnwindCode::PushRegister {
|
||||
instruction_offset: 2,
|
||||
reg: GPR.index_of(RU::rbp.into()) as u8
|
||||
},
|
||||
UnwindCode::StackAlloc {
|
||||
instruction_offset: 27,
|
||||
size: 10000
|
||||
}
|
||||
]
|
||||
}
|
||||
);
|
||||
|
||||
assert_eq!(unwind.emit_size(), 12);
|
||||
|
||||
let mut buf = [0u8; 12];
|
||||
unwind.emit(&mut buf);
|
||||
|
||||
assert_eq!(
|
||||
buf,
|
||||
[
|
||||
0x01, // Version and flags (version 1, no flags)
|
||||
0x1B, // Prologue size
|
||||
0x03, // Unwind code count (2 for stack alloc, 1 for push reg)
|
||||
0x00, // Frame register + offset (no frame register)
|
||||
0x1B, // Prolog offset
|
||||
0x01, // Operation 1 (large stack alloc), size is scaled 16-bits (info = 0)
|
||||
0xE2, // Low size byte
|
||||
0x04, // High size byte (e.g. 0x04E2 * 8 = 10000 bytes)
|
||||
0x02, // Prolog offset
|
||||
0x50, // Operation 0 (push nonvolatile register), reg = 5 (RBP)
|
||||
0x00, // Padding
|
||||
0x00, // Padding
|
||||
]
|
||||
);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_large_alloc() {
|
||||
let isa = lookup_variant(triple!("x86_64"), BackendVariant::Legacy)
|
||||
.expect("expect x86 ISA")
|
||||
.finish(Flags::new(builder()));
|
||||
|
||||
let mut context = Context::for_function(create_function(
|
||||
CallConv::WindowsFastcall,
|
||||
Some(StackSlotData::new(StackSlotKind::ExplicitSlot, 1000000)),
|
||||
));
|
||||
|
||||
context.compile(&*isa).expect("expected compilation");
|
||||
|
||||
let unwind = create_unwind_info(&context.func, &*isa)
|
||||
.expect("can create unwind info")
|
||||
.expect("expected unwind info");
|
||||
|
||||
assert_eq!(
|
||||
unwind,
|
||||
UnwindInfo {
|
||||
flags: 0,
|
||||
prologue_size: 27,
|
||||
frame_register: None,
|
||||
frame_register_offset: 0,
|
||||
unwind_codes: vec![
|
||||
UnwindCode::PushRegister {
|
||||
instruction_offset: 2,
|
||||
reg: GPR.index_of(RU::rbp.into()) as u8
|
||||
},
|
||||
UnwindCode::StackAlloc {
|
||||
instruction_offset: 27,
|
||||
size: 1000000
|
||||
}
|
||||
]
|
||||
}
|
||||
);
|
||||
|
||||
assert_eq!(unwind.emit_size(), 12);
|
||||
|
||||
let mut buf = [0u8; 12];
|
||||
unwind.emit(&mut buf);
|
||||
|
||||
assert_eq!(
|
||||
buf,
|
||||
[
|
||||
0x01, // Version and flags (version 1, no flags)
|
||||
0x1B, // Prologue size
|
||||
0x04, // Unwind code count (3 for stack alloc, 1 for push reg)
|
||||
0x00, // Frame register + offset (no frame register)
|
||||
0x1B, // Prolog offset
|
||||
0x11, // Operation 1 (large stack alloc), size is unscaled 32-bits (info = 1)
|
||||
0x40, // Byte 1 of size
|
||||
0x42, // Byte 2 of size
|
||||
0x0F, // Byte 3 of size
|
||||
0x00, // Byte 4 of size (size is 0xF4240 = 1000000 bytes)
|
||||
0x02, // Prolog offset
|
||||
0x50, // Operation 0 (push nonvolatile register), reg = 5 (RBP)
|
||||
]
|
||||
);
|
||||
}
|
||||
|
||||
fn create_function(call_conv: CallConv, stack_slot: Option<StackSlotData>) -> Function {
|
||||
let mut func =
|
||||
Function::with_name_signature(ExternalName::user(0, 0), Signature::new(call_conv));
|
||||
|
||||
let block0 = func.dfg.make_block();
|
||||
let mut pos = FuncCursor::new(&mut func);
|
||||
pos.insert_block(block0);
|
||||
pos.ins().return_(&[]);
|
||||
|
||||
if let Some(stack_slot) = stack_slot {
|
||||
func.stack_slots.push(stack_slot);
|
||||
}
|
||||
|
||||
func
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user