Convert regular comments to documentation comments.
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@@ -11,28 +11,28 @@ use timing;
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use std::cmp::Ordering;
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use std::vec::Vec;
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// RPO numbers are not first assigned in a contiguous way but as multiples of STRIDE, to leave
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// room for modifications of the dominator tree.
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/// RPO numbers are not first assigned in a contiguous way but as multiples of STRIDE, to leave
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/// room for modifications of the dominator tree.
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const STRIDE: u32 = 4;
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// Special RPO numbers used during `compute_postorder`.
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/// Special RPO numbers used during `compute_postorder`.
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const DONE: u32 = 1;
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const SEEN: u32 = 2;
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// Dominator tree node. We keep one of these per EBB.
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/// Dominator tree node. We keep one of these per EBB.
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#[derive(Clone, Default)]
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struct DomNode {
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// Number of this node in a reverse post-order traversal of the CFG, starting from 1.
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// This number is monotonic in the reverse postorder but not contiguous, since we leave
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// holes for later localized modifications of the dominator tree.
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// Unreachable nodes get number 0, all others are positive.
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/// Number of this node in a reverse post-order traversal of the CFG, starting from 1.
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/// This number is monotonic in the reverse postorder but not contiguous, since we leave
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/// holes for later localized modifications of the dominator tree.
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/// Unreachable nodes get number 0, all others are positive.
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rpo_number: u32,
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// The immediate dominator of this EBB, represented as the branch or jump instruction at the
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// end of the dominating basic block.
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//
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// This is `None` for unreachable blocks and the entry block which doesn't have an immediate
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// dominator.
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/// The immediate dominator of this EBB, represented as the branch or jump instruction at the
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/// end of the dominating basic block.
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///
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/// This is `None` for unreachable blocks and the entry block which doesn't have an immediate
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/// dominator.
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idom: PackedOption<Inst>,
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}
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@@ -40,10 +40,10 @@ struct DomNode {
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pub struct DominatorTree {
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nodes: EntityMap<Ebb, DomNode>,
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// CFG post-order of all reachable EBBs.
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/// CFG post-order of all reachable EBBs.
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postorder: Vec<Ebb>,
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// Scratch memory used by `compute_postorder()`.
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/// Scratch memory used by `compute_postorder()`.
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stack: Vec<Ebb>,
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valid: bool,
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@@ -348,18 +348,18 @@ impl ValueDef {
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}
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}
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// Internal table storage for extended values.
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/// Internal table storage for extended values.
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#[derive(Clone, Debug)]
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enum ValueData {
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// Value is defined by an instruction.
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/// Value is defined by an instruction.
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Inst { ty: Type, num: u16, inst: Inst },
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// Value is an EBB parameter.
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/// Value is an EBB parameter.
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Param { ty: Type, num: u16, ebb: Ebb },
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// Value is an alias of another value.
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// An alias value can't be linked as an instruction result or EBB parameter. It is used as a
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// placeholder when the original instruction or EBB has been rewritten or modified.
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/// Value is an alias of another value.
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/// An alias value can't be linked as an instruction result or EBB parameter. It is used as a
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/// placeholder when the original instruction or EBB has been rewritten or modified.
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Alias { ty: Type, original: Value },
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}
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@@ -829,14 +829,14 @@ impl DataFlowGraph {
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}
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}
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// Contents of an extended basic block.
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//
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// Parameters on an extended basic block are values that dominate everything in the EBB. All
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// branches to this EBB must provide matching arguments, and the arguments to the entry EBB must
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// match the function arguments.
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/// Contents of an extended basic block.
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///
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/// Parameters on an extended basic block are values that dominate everything in the EBB. All
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/// branches to this EBB must provide matching arguments, and the arguments to the entry EBB must
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/// match the function arguments.
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#[derive(Clone)]
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struct EbbData {
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// List of parameters to this EBB.
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/// List of parameters to this EBB.
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params: ValueList,
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}
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@@ -35,12 +35,12 @@ impl From<i64> for Imm64 {
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}
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}
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// Hexadecimal with a multiple of 4 digits and group separators:
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//
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// 0xfff0
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// 0x0001_ffff
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// 0xffff_ffff_fff8_4400
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//
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/// Hexadecimal with a multiple of 4 digits and group separators:
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///
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/// 0xfff0
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/// 0x0001_ffff
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/// 0xffff_ffff_fff8_4400
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///
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fn write_hex(x: i64, f: &mut Formatter) -> fmt::Result {
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let mut pos = (64 - x.leading_zeros() - 1) & 0xf0;
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write!(f, "0x{:04x}", (x >> pos) & 0xffff)?;
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@@ -280,16 +280,16 @@ pub struct Ieee32(u32);
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#[derive(Copy, Clone, Debug, Eq, PartialEq, Hash)]
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pub struct Ieee64(u64);
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// Format a floating point number in a way that is reasonably human-readable, and that can be
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// converted back to binary without any rounding issues. The hexadecimal formatting of normal and
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// subnormal numbers is compatible with C99 and the `printf "%a"` format specifier. The NaN and Inf
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// formats are not supported by C99.
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//
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// The encoding parameters are:
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//
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// w - exponent field width in bits
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// t - trailing significand field width in bits
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//
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/// Format a floating point number in a way that is reasonably human-readable, and that can be
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/// converted back to binary without any rounding issues. The hexadecimal formatting of normal and
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/// subnormal numbers is compatible with C99 and the `printf "%a"` format specifier. The NaN and Inf
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/// formats are not supported by C99.
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///
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/// The encoding parameters are:
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///
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/// w - exponent field width in bits
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/// t - trailing significand field width in bits
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///
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fn format_float(bits: u64, w: u8, t: u8, f: &mut Formatter) -> fmt::Result {
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debug_assert!(w > 0 && w <= 16, "Invalid exponent range");
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debug_assert!(1 + w + t <= 64, "Too large IEEE format for u64");
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@@ -358,13 +358,13 @@ fn format_float(bits: u64, w: u8, t: u8, f: &mut Formatter) -> fmt::Result {
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}
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}
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// Parse a float using the same format as `format_float` above.
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//
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// The encoding parameters are:
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//
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// w - exponent field width in bits
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// t - trailing significand field width in bits
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//
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/// Parse a float using the same format as `format_float` above.
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///
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/// The encoding parameters are:
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///
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/// w - exponent field width in bits
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/// t - trailing significand field width in bits
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///
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fn parse_float(s: &str, w: u8, t: u8) -> Result<u64, &'static str> {
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debug_assert!(w > 0 && w <= 16, "Invalid exponent range");
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debug_assert!(1 + w + t <= 64, "Too large IEEE format for u64");
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@@ -26,18 +26,18 @@ use timing;
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///
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#[derive(Clone)]
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pub struct Layout {
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// Linked list nodes for the layout order of EBBs Forms a doubly linked list, terminated in
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// both ends by `None`.
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/// Linked list nodes for the layout order of EBBs Forms a doubly linked list, terminated in
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/// both ends by `None`.
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ebbs: EntityMap<Ebb, EbbNode>,
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// Linked list nodes for the layout order of instructions. Forms a double linked list per EBB,
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// terminated in both ends by `None`.
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/// Linked list nodes for the layout order of instructions. Forms a double linked list per EBB,
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/// terminated in both ends by `None`.
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insts: EntityMap<Inst, InstNode>,
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// First EBB in the layout order, or `None` when no EBBs have been laid out.
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/// First EBB in the layout order, or `None` when no EBBs have been laid out.
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first_ebb: Option<Ebb>,
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// Last EBB in the layout order, or `None` when no EBBs have been laid out.
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/// Last EBB in the layout order, or `None` when no EBBs have been laid out.
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last_ebb: Option<Ebb>,
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}
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@@ -61,31 +61,31 @@ impl Layout {
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}
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}
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// Sequence numbers.
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//
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// All instructions and EBBs are given a sequence number that can be used to quickly determine
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// their relative position in the layout. The sequence numbers are not contiguous, but are assigned
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// like line numbers in BASIC: 10, 20, 30, ...
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//
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// The EBB sequence numbers are strictly increasing, and so are the instruction sequence numbers
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// within an EBB. The instruction sequence numbers are all between the sequence number of their
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// containing EBB and the following EBB.
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//
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// The result is that sequence numbers work like BASIC line numbers for the textual form of the IR.
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/// Sequence numbers.
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///
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/// All instructions and EBBs are given a sequence number that can be used to quickly determine
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/// their relative position in the layout. The sequence numbers are not contiguous, but are assigned
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/// like line numbers in BASIC: 10, 20, 30, ...
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///
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/// The EBB sequence numbers are strictly increasing, and so are the instruction sequence numbers
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/// within an EBB. The instruction sequence numbers are all between the sequence number of their
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/// containing EBB and the following EBB.
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///
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/// The result is that sequence numbers work like BASIC line numbers for the textual form of the IR.
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type SequenceNumber = u32;
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// Initial stride assigned to new sequence numbers.
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/// Initial stride assigned to new sequence numbers.
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const MAJOR_STRIDE: SequenceNumber = 10;
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// Secondary stride used when renumbering locally.
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/// Secondary stride used when renumbering locally.
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const MINOR_STRIDE: SequenceNumber = 2;
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// Limit on the sequence number range we'll renumber locally. If this limit is exceeded, we'll
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// switch to a full function renumbering.
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/// Limit on the sequence number range we'll renumber locally. If this limit is exceeded, we'll
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/// switch to a full function renumbering.
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const LOCAL_LIMIT: SequenceNumber = 100 * MINOR_STRIDE;
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// Compute the midpoint between `a` and `b`.
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// Return `None` if the midpoint would be equal to either.
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/// Compute the midpoint between `a` and `b`.
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/// Return `None` if the midpoint would be equal to either.
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fn midpoint(a: SequenceNumber, b: SequenceNumber) -> Option<SequenceNumber> {
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debug_assert!(a < b);
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// Avoid integer overflow.
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@@ -24,10 +24,10 @@ pub struct Type(u8);
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/// a SIMD vector.
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pub const VOID: Type = Type(0);
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// Start of the lane types. See also `meta/cdsl.types.py`.
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/// Start of the lane types. See also `meta/cdsl.types.py`.
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const LANE_BASE: u8 = 0x70;
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// Start of the 2-lane vector types.
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/// Start of the 2-lane vector types.
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const VECTOR_BASE: u8 = LANE_BASE + 16;
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// Include code generated by `lib/cretonne/meta/gen_types.py`. This file contains constant
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@@ -548,8 +548,8 @@ impl<'a> Context<'a> {
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}
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}
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// Struct representing a register use of a value.
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// Used to detect multiple uses of the same value with incompatible register constraints.
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/// Struct representing a register use of a value.
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/// Used to detect multiple uses of the same value with incompatible register constraints.
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#[derive(Clone, Copy)]
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struct RegUse {
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value: Value,
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