Merge remote-tracking branch 'origin/master' into no_std

lib/native/src/lib.rs

@@ -1,6 +1,9 @@
 //! Performs autodetection of the host for the purposes of running
 //! Cretonne to generate code to run on the same machine.
-#![deny(missing_docs)]
+
+#![deny(missing_docs,
+        trivial_numeric_casts,
+        unused_extern_crates)]
 
 #![cfg_attr(not(feature = "std"), no_std)]
 
@@ -18,7 +21,7 @@ use raw_cpuid::CpuId;
 /// Return `settings` and `isa` builders configured for the current host
 /// machine, or `Err(())` if the host machine is not supported
 /// in the current configuration.
-pub fn builders() -> Result<(settings::Builder, isa::Builder), ()> {
+pub fn builders() -> Result<(settings::Builder, isa::Builder), &'static str> {
     let mut flag_builder = settings::builder();
 
     // TODO: Add RISC-V support once Rust supports it.
@@ -34,28 +37,28 @@ pub fn builders() -> Result<(settings::Builder, isa::Builder), ()> {
     } else if cfg!(target_arch = "aarch64") {
         "arm64"
     } else {
-        return Err(());
+        return Err("unrecognized architecture");
     };
 
     let mut isa_builder = isa::lookup(name).map_err(|err| match err {
         isa::LookupError::Unknown => panic!(),
-        isa::LookupError::Unsupported => (),
+        isa::LookupError::Unsupported => "unsupported architecture",
     })?;
 
     if cfg!(any(target_arch = "x86", target_arch = "x86_64")) {
-        parse_x86_cpuid(&mut isa_builder);
+        parse_x86_cpuid(&mut isa_builder)?;
     }
 
     Ok((flag_builder, isa_builder))
 }
 
 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
-fn parse_x86_cpuid(isa_builder: &mut isa::Builder) {
+fn parse_x86_cpuid(isa_builder: &mut isa::Builder) -> Result<(), &'static str> {
     let cpuid = CpuId::new();
 
     if let Some(info) = cpuid.get_feature_info() {
-        if info.has_sse2() {
-            isa_builder.enable("has_sse2").unwrap();
+        if !info.has_sse2() {
+            return Err("x86 support requires SSE2");
         }
         if info.has_sse3() {
             isa_builder.enable("has_sse3").unwrap();
@@ -86,4 +89,5 @@ fn parse_x86_cpuid(isa_builder: &mut isa::Builder) {
             isa_builder.enable("has_lzcnt").unwrap();
         }
     }
+    Ok(())
 }