Address review comments:
- Undo temporary changes to default features (`all-arch`) and a
signal-handler test.
- Remove `SIGTRAP` handler: no longer needed now that we've found an
"undefined opcode" option on ARM64.
- Rename pp.rs to pretty_print.rs in machinst/.
- Only use empty stack-probe on non-x86. As per a comment in
rust-lang/compiler-builtins [1], LLVM only supports stack probes on
x86 and x86-64. Thus, on any other CPU architecture, we cannot refer
to `__rust_probestack`, because it does not exist.
- Rename arm64 to aarch64.
- Use `target` directive in vcode filetests.
- Run the flags verifier, but without encinfo, when using new backends.
- Clean up warning overrides.
- Fix up use of casts: use u32::from(x) and siblings when possible,
u32::try_from(x).unwrap() when not, to avoid silent truncation.
- Take immutable `Function` borrows as input; we don't actually
mutate the input IR.
- Lots of other miscellaneous cleanups.
[1] cae3e6ea23/src/probestack.rs (L39)
This commit is contained in:
@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f(i64, i64) -> i64 {
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block0(v0: i64, v1: i64):
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f(i32, i32) -> i32 {
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block0(v0: i32, v1: i32):
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %a(i32) -> i32 {
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block0(v0: i32):
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f(i64, i64) -> i64 {
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sig0 = (i64) -> i64
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f(i64) -> i64 {
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fn0 = %g(i64) -> i64
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f(i64, i64) -> b1 {
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block0(v0: i64, v1: i64):
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@@ -33,7 +34,7 @@ block2:
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; nextln: mov fp, sp
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; nextln: subs xzr, x0, x1
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; nextln: b.eq 20
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; check: Block 0:
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; check: Block 2:
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; check: movz x0, #2
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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@@ -58,7 +59,7 @@ block1:
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; check: stp fp, lr, [sp, #-16]!
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; nextln: mov fp, sp
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; nextln: subs xzr, x0, x1
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; check: Block 0:
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; check: Block 1:
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; check: movz x0, #1
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; nextln: mov sp, fp
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; nextln: ldp fp, lr, [sp], #16
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f(i8, i64, i64) -> i64 {
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block0(v0: i8, v1: i64, v2: i64):
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f() -> i64 {
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block0:
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f(i8) -> i64 {
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block0(v0: i8):
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f(i64) -> i64 {
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jt0 = jump_table [block1, block2, block3]
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %add8(i8, i8) -> i8 {
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block0(v0: i8, v1: i8):
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %uaddsat64(i64, i64) -> i64 {
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block0(v0: i64, v1: i64):
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f(i64) -> i64 {
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block0(v0: i64):
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; ROR, variable
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f() -> i64 {
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gv0 = symbol %my_global
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f() {
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block0:
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@@ -1,4 +1,5 @@
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test vcode arch=arm64
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test vcode
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target aarch64
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function %f_u_8_64(i8) -> i64 {
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block0(v0: i8):
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