Address review comments:

- Undo temporary changes to default features (`all-arch`) and a
  signal-handler test.
- Remove `SIGTRAP` handler: no longer needed now that we've found an
  "undefined opcode" option on ARM64.
- Rename pp.rs to pretty_print.rs in machinst/.
- Only use empty stack-probe on non-x86. As per a comment in
  rust-lang/compiler-builtins [1], LLVM only supports stack probes on
  x86 and x86-64. Thus, on any other CPU architecture, we cannot refer
  to `__rust_probestack`, because it does not exist.
- Rename arm64 to aarch64.
- Use `target` directive in vcode filetests.
- Run the flags verifier, but without encinfo, when using new backends.
- Clean up warning overrides.
- Fix up use of casts: use u32::from(x) and siblings when possible,
  u32::try_from(x).unwrap() when not, to avoid silent truncation.
- Take immutable `Function` borrows as input; we don't actually
  mutate the input IR.
- Lots of other miscellaneous cleanups.

[1] cae3e6ea23/src/probestack.rs (L39)
This commit is contained in:
Chris Fallin
2020-04-15 16:31:44 -07:00
parent 3de504c24c
commit 48cf2c2f50
49 changed files with 1550 additions and 1544 deletions

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f(i64, i64) -> i64 {
block0(v0: i64, v1: i64):

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f(i32, i32) -> i32 {
block0(v0: i32, v1: i32):

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %a(i32) -> i32 {
block0(v0: i32):

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f(i64, i64) -> i64 {
sig0 = (i64) -> i64

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f(i64) -> i64 {
fn0 = %g(i64) -> i64

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
@@ -33,7 +34,7 @@ block2:
; nextln: mov fp, sp
; nextln: subs xzr, x0, x1
; nextln: b.eq 20
; check: Block 0:
; check: Block 2:
; check: movz x0, #2
; nextln: mov sp, fp
; nextln: ldp fp, lr, [sp], #16
@@ -58,7 +59,7 @@ block1:
; check: stp fp, lr, [sp, #-16]!
; nextln: mov fp, sp
; nextln: subs xzr, x0, x1
; check: Block 0:
; check: Block 1:
; check: movz x0, #1
; nextln: mov sp, fp
; nextln: ldp fp, lr, [sp], #16

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f() -> i64 {
block0:

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f(i8) -> i64 {
block0(v0: i8):

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f(i64) -> i64 {
jt0 = jump_table [block1, block2, block3]

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %add8(i8, i8) -> i8 {
block0(v0: i8, v1: i8):

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %uaddsat64(i64, i64) -> i64 {
block0(v0: i64, v1: i64):

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f(i64) -> i64 {
block0(v0: i64):

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ROR, variable

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f() -> i64 {
gv0 = symbol %my_global

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f() {
block0:

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@@ -1,4 +1,5 @@
test vcode arch=arm64
test vcode
target aarch64
function %f_u_8_64(i8) -> i64 {
block0(v0: i8):