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fuzzgen: Initial SIMD support (#5885)

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* fuzzgen: Initial SIMD support

* riscv64: Address PR Feedback

Thanks!
This commit is contained in:
Afonso Bordado
2023-02-28 11:33:11 +00:00
committed by GitHub
parent ae881407cd
commit 480c45b854
5 changed files with 69 additions and 36 deletions
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19
cranelift/fuzzgen/src/function_generator.rs
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@@ -565,6 +565,12 @@ fn valid_for_target(triple: &Triple, op: Opcode, args: &[Type], rets: &[Type]) -
}
Architecture::Riscv64(_) => {
// RISC-V Does not support SIMD at all
let is_simd = args.iter().chain(rets).any(|t| t.is_vector());
if is_simd {
return false;
}
exceptions!(
// TODO
(Opcode::IaddCout),
@@ -737,6 +743,10 @@ const OPCODE_SIGNATURES: &[OpcodeSignature] = &[
(Opcode::Iabs, &[I32], &[I32], insert_opcode),
(Opcode::Iabs, &[I64], &[I64], insert_opcode),
(Opcode::Iabs, &[I128], &[I128], insert_opcode),
(Opcode::Iabs, &[I8X16, I8X16], &[I8X16], insert_opcode),
(Opcode::Iabs, &[I16X8, I16X8], &[I16X8], insert_opcode),
(Opcode::Iabs, &[I32X4, I32X4], &[I32X4], insert_opcode),
(Opcode::Iabs, &[I64X2, I64X2], &[I64X2], insert_opcode),
// Smin
(Opcode::Smin, &[I8, I8], &[I8], insert_opcode),
(Opcode::Smin, &[I16, I16], &[I16], insert_opcode),
@@ -1552,6 +1562,11 @@ where
}
DataValue::F32(f) => builder.ins().f32const(f),
DataValue::F64(f) => builder.ins().f64const(f),
DataValue::V128(bytes) => {
let data = bytes.to_vec().into();
let handle = builder.func.dfg.constants.insert(data);
builder.ins().vconst(ty, handle)
}
_ => unimplemented!(),
})
}
@@ -1922,7 +1937,7 @@ where
let mut params = Vec::with_capacity(param_count);
for _ in 0..param_count {
params.push(self.u._type()?);
params.push(self.u._type(self.target_triple.architecture)?);
}
Ok(params)
}
@@ -1942,7 +1957,7 @@ where
// Create a pool of vars that are going to be used in this function
for _ in 0..self.param(&self.config.vars_per_function)? {
let ty = self.u._type()?;
let ty = self.u._type(self.target_triple.architecture)?;
let value = self.generate_const(builder, ty)?;
vars.push((ty, value));
}