Flush Icache on AArch64 Windows (#4997)
* cranelift: Add FlushInstructionCache for AArch64 on Windows This was previously done on #3426 for linux. * wasmtime: Add FlushInstructionCache for AArch64 on Windows This was previously done on #3426 for linux. * cranelift: Add MemoryUse flag to JIT Memory Manager This allows us to keep the icache flushing code self-contained and not leak implementation details. This also changes the windows icache flushing code to only flush pages that were previously unflushed. * Add jit-icache-coherence crate * cranelift: Use `jit-icache-coherence` * wasmtime: Use `jit-icache-coherence` * jit-icache-coherence: Make rustix feature additive Mutually exclusive features cause issues. * wasmtime: Remove rustix from wasmtime-jit We now use it via jit-icache-coherence * Rename wasmtime-jit-icache-coherency crate * Use cfg-if in wasmtime-jit-icache-coherency crate * Use inline instead of inline(always) * Add unsafe marker to clear_cache * Conditionally compile all rustix operations membarrier does not exist on MacOS * Publish `wasmtime-jit-icache-coherence` * Remove explicit windows check This is implied by the target_os = "windows" above * cranelift: Remove len != 0 check This is redundant as it is done in non_protected_allocations_iter * Comment cleanups Thanks @akirilov-arm! * Make clear_cache safe * Rename pipeline_flush to pipeline_flush_mt * Revert "Make clear_cache safe" This reverts commit 21165d81c9030ed9b291a1021a367214d2942c90. * More docs! * Fix pipeline_flush reference on clear_cache * Update more docs! * Move pipeline flush after `mprotect` calls Technically the `clear_cache` operation is a lie in AArch64, so move the pipeline flush after the `mprotect` calls so that it benefits from the implicit cache cleaning done by it. * wasmtime: Remove rustix backend from icache crate * wasmtime: Use libc for macos * wasmtime: Flush icache on all arch's for windows * wasmtime: Add flags to membarrier call
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crates/jit-icache-coherence/src/libc.rs
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88
crates/jit-icache-coherence/src/libc.rs
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#![allow(unused)]
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use libc::{syscall, EINVAL, EPERM};
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use std::ffi::c_void;
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use std::io::{Error, Result};
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const MEMBARRIER_CMD_GLOBAL: libc::c_int = 1;
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const MEMBARRIER_CMD_PRIVATE_EXPEDITED_SYNC_CORE: libc::c_int = 32;
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const MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_SYNC_CORE: libc::c_int = 64;
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/// See docs on [crate::pipeline_flush_mt] for a description of what this function is trying to do.
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#[inline]
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pub(crate) fn pipeline_flush_mt() -> Result<()> {
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// Ensure that no processor has fetched a stale instruction stream.
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//
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// On AArch64 we try to do this by executing a "broadcast" `ISB` which is not something that the
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// architecture provides us but we can emulate it using the membarrier kernel interface.
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//
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// This behaviour was documented in a patch, however it seems that it hasn't been upstreamed yet
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// Nevertheless it clearly explains the guarantees that the Linux kernel provides us regarding the
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// membarrier interface, and how to use it for JIT contexts.
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// https://lkml.kernel.org/lkml/07a8b963002cb955b7516e61bad19514a3acaa82.1623813516.git.luto@kernel.org/
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//
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// I couldn't find the follow up for that patch but there doesn't seem to be disagreement about
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// that specific part in the replies.
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// TODO: Check if the kernel has updated the membarrier documentation
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//
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// See the following issues for more info:
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// * https://github.com/bytecodealliance/wasmtime/pull/3426
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// * https://github.com/bytecodealliance/wasmtime/pull/4997
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//
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// TODO: x86 and s390x have coherent caches so they don't need this, but RISCV does not
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// guarantee that, so we may need to do something similar for it. However as noted in the above
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// kernel patch the SYNC_CORE membarrier has different guarantees on each architecture
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// so we need follow up and check what it provides us.
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// See: https://github.com/bytecodealliance/wasmtime/issues/5033
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#[cfg(all(target_arch = "aarch64", target_os = "linux"))]
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match membarrier(MEMBARRIER_CMD_PRIVATE_EXPEDITED_SYNC_CORE) {
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Ok(_) => {}
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// EPERM happens if the calling process hasn't yet called the register membarrier.
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// We can call the register membarrier now, and then retry the actual membarrier,
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//
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// This does have some overhead since on the first time we call this function we
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// actually execute three membarriers, but this only happens once per process and only
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// one slow membarrier is actually executed (The last one, which actually generates an IPI).
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Err(e) if e.raw_os_error().unwrap() == EPERM => {
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membarrier(MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_SYNC_CORE)?;
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membarrier(MEMBARRIER_CMD_PRIVATE_EXPEDITED_SYNC_CORE)?;
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}
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// On kernels older than 4.16 the above syscall does not exist, so we can
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// fallback to MEMBARRIER_CMD_GLOBAL which is an alias for MEMBARRIER_CMD_SHARED
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// that has existed since 4.3. GLOBAL is a lot slower, but allows us to have
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// compatibility with older kernels.
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Err(e) if e.raw_os_error().unwrap() == EINVAL => {
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membarrier(MEMBARRIER_CMD_GLOBAL)?;
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}
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// In any other case we got an actual error, so lets propagate that up
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e => e?,
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}
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Ok(())
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}
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#[cfg(target_os = "linux")]
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fn membarrier(barrier: libc::c_int) -> Result<()> {
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let flags: libc::c_int = 0;
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let res = unsafe { syscall(libc::SYS_membarrier, barrier, flags) };
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if res == 0 {
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Ok(())
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} else {
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Err(Error::last_os_error())
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}
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}
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/// See docs on [crate::clear_cache] for a description of what this function is trying to do.
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#[inline]
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pub(crate) fn clear_cache(_ptr: *const c_void, _len: usize) -> Result<()> {
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// TODO: On AArch64 we currently rely on the `mprotect` call that switches the memory from W+R to R+X
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// to do this for us, however that is an implementation detail and should not be relied upon
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// We should call some implementation of `clear_cache` here
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//
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// See: https://github.com/bytecodealliance/wasmtime/issues/3310
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Ok(())
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}
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