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Cranelift: pass iterators to ABIMachineSpec::compute_arg_locs (#5095)

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Instead of slices. This gives us more flexibility to pass custom sequences
without needing to allocate a `Vec` to hold them and pass in as a slice.
This commit is contained in:
Nick Fitzgerald
2022-10-21 16:08:09 -07:00
committed by GitHub
parent 5c5fa192f7
commit 442f9fa01b
5 changed files with 30 additions and 16 deletions
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9
cranelift/codegen/src/isa/aarch64/abi.rs
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@@ -87,13 +87,16 @@ impl ABIMachineSpec for AArch64MachineDeps {
16
}
fn compute_arg_locs(
fn compute_arg_locs<'a, I>(
call_conv: isa::CallConv,
_flags: &settings::Flags,
params: &[ir::AbiParam],
params: I,
args_or_rets: ArgsOrRets,
add_ret_area_ptr: bool,
) -> CodegenResult<(ABIArgVec, i64, Option<usize>)> {
) -> CodegenResult<(ABIArgVec, i64, Option<usize>)>
where
I: IntoIterator<Item = &'a ir::AbiParam>,
{
let is_apple_cc = call_conv.extends_apple_aarch64();
// See AArch64 ABI (https://github.com/ARM-software/abi-aa/blob/2021Q1/aapcs64/aapcs64.rst#64parameter-passing), sections 6.4.

9
cranelift/codegen/src/isa/riscv64/abi.rs
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@@ -56,13 +56,16 @@ impl ABIMachineSpec for Riscv64MachineDeps {
16
}
fn compute_arg_locs(
fn compute_arg_locs<'a, I>(
call_conv: isa::CallConv,
_flags: &settings::Flags,
params: &[ir::AbiParam],
params: I,
args_or_rets: ArgsOrRets,
add_ret_area_ptr: bool,
) -> CodegenResult<(ABIArgVec, i64, Option<usize>)> {
) -> CodegenResult<(ABIArgVec, i64, Option<usize>)>
where
I: IntoIterator<Item = &'a ir::AbiParam>,
{
// All registers that can be used as parameters or rets.
// both start and end are included.
let (x_start, x_end, f_start, f_end) = if args_or_rets == ArgsOrRets::Args {

11
cranelift/codegen/src/isa/s390x/abi.rs
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@@ -221,13 +221,16 @@ impl ABIMachineSpec for S390xMachineDeps {
8
}
fn compute_arg_locs(
fn compute_arg_locs<'a, I>(
call_conv: isa::CallConv,
_flags: &settings::Flags,
params: &[ir::AbiParam],
params: I,
args_or_rets: ArgsOrRets,
add_ret_area_ptr: bool,
) -> CodegenResult<(ABIArgVec, i64, Option<usize>)> {
) -> CodegenResult<(ABIArgVec, i64, Option<usize>)>
where
I: IntoIterator<Item = &'a ir::AbiParam>,
{
let mut next_gpr = 0;
let mut next_fpr = 0;
let mut next_vr = 0;
@@ -245,7 +248,7 @@ impl ABIMachineSpec for S390xMachineDeps {
next_gpr += 1;
}
for (i, mut param) in params.iter().copied().enumerate() {
for (i, mut param) in params.into_iter().copied().enumerate() {
let intreg = in_int_reg(param.value_type);
let fltreg = in_flt_reg(param.value_type);
let vecreg = in_vec_reg(param.value_type);

9
cranelift/codegen/src/isa/x64/abi.rs
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@@ -81,13 +81,16 @@ impl ABIMachineSpec for X64ABIMachineSpec {
16
}
fn compute_arg_locs(
fn compute_arg_locs<'a, I>(
call_conv: isa::CallConv,
flags: &settings::Flags,
params: &[ir::AbiParam],
params: I,
args_or_rets: ArgsOrRets,
add_ret_area_ptr: bool,
) -> CodegenResult<(ABIArgVec, i64, Option<usize>)> {
) -> CodegenResult<(ABIArgVec, i64, Option<usize>)>
where
I: IntoIterator<Item = &'a ir::AbiParam>,
{
let is_fastcall = call_conv.extends_windows_fastcall();
let mut next_gpr = 0;

8
cranelift/codegen/src/machinst/abi.rs
View File

@@ -345,13 +345,15 @@ pub trait ABIMachineSpec {
/// Returns the list of argument locations, the stack-space used (rounded up
/// to as alignment requires), and if `add_ret_area_ptr` was passed, the
/// index of the extra synthetic arg that was added.
fn compute_arg_locs(
fn compute_arg_locs<'a, I>(
call_conv: isa::CallConv,
flags: &settings::Flags,
params: &[ir::AbiParam],
params: I,
args_or_rets: ArgsOrRets,
add_ret_area_ptr: bool,
) -> CodegenResult<(ABIArgVec, i64, Option<usize>)>;
) -> CodegenResult<(ABIArgVec, i64, Option<usize>)>
where
I: IntoIterator<Item = &'a ir::AbiParam>;
/// Returns the offset from FP to the argument area, i.e., jumping over the saved FP, return
/// address, and maybe other standard elements depending on ABI (e.g. Wasm TLS reg).