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Cranellift: remove Baldrdash support and related features. (#4571)

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* Cranellift: remove Baldrdash support and related features.

As noted in Mozilla's bugzilla bug 1781425 [1], the SpiderMonkey team
has recently determined that their current form of integration with
Cranelift is too hard to maintain, and they have chosen to remove it
from their codebase. If and when they decide to build updated support
for Cranelift, they will adopt different approaches to several details
of the integration.

In the meantime, after discussion with the SpiderMonkey folks, they
agree that it makes sense to remove the bits of Cranelift that exist
to support the integration ("Baldrdash"), as they will not need
them. Many of these bits are difficult-to-maintain special cases that
are not actually tested in Cranelift proper: for example, the
Baldrdash integration required Cranelift to emit function bodies
without prologues/epilogues, and instead communicate very precise
information about the expected frame size and layout, then stitched
together something post-facto. This was brittle and caused a lot of
incidental complexity ("fallthrough returns", the resulting special
logic in block-ordering); this is just one example. As another
example, one particular Baldrdash ABI variant processed stack args in
reverse order, so our ABI code had to support both traversal
orders. We had a number of other Baldrdash-specific settings as well
that did various special things.

This PR removes Baldrdash ABI support, the `fallthrough_return`
instruction, and pulls some threads to remove now-unused bits as a
result of those two, with the  understanding that the SpiderMonkey folks
will build new functionality as needed in the future and we can perhaps
find cleaner abstractions to make it all work.

[1] https://bugzilla.mozilla.org/show_bug.cgi?id=1781425

* Review feedback.

* Fix (?) DWARF debug tests: add `--disable-cache` to wasmtime invocations.

The debugger tests invoke `wasmtime` from within each test case under
the control of a debugger (gdb or lldb). Some of these tests started to
inexplicably fail in CI with unrelated changes, and the failures were
only inconsistently reproducible locally. It seems to be cache related:
if we disable cached compilation on the nested `wasmtime` invocations,
the tests consistently pass.

* Review feedback.
This commit is contained in:
Chris Fallin
2022-08-02 12:37:56 -07:00
committed by GitHub
parent ff37c9d8a4
commit 43f1765272
57 changed files with 221 additions and 1134 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
cranelift/codegen/src/machinst/abi.rs
View File

@@ -89,11 +89,6 @@ pub trait ABICallee {
/// Generate a return instruction.
fn gen_ret(&self) -> Self::I;
/// Generate an epilogue placeholder. The returned instruction should return `true` from
/// `is_epilogue_placeholder()`; this is used to indicate to the lowering driver when
/// the epilogue should be inserted.
fn gen_epilogue_placeholder(&self) -> Self::I;
// -----------------------------------------------------------------
// Every function above this line may only be called pre-regalloc.
// Every function below this line may only be called post-regalloc.
@@ -159,9 +154,7 @@ pub trait ABICallee {
/// Returns the full frame size for the given function, after prologue
/// emission has run. This comprises the spill slots and stack-storage slots
/// (but not storage for clobbered callee-save registers, arguments pushed
/// at callsites within this function, or other ephemeral pushes). This is
/// used for ABI variants where the client generates prologue/epilogue code,
/// as in Baldrdash (SpiderMonkey integration).
/// at callsites within this function, or other ephemeral pushes).
fn frame_size(&self) -> u32;
/// Returns the size of arguments expected on the stack.

135
cranelift/codegen/src/machinst/abi_impl.rs
View File

@@ -97,31 +97,9 @@
//!
//! # Multi-value Returns
//!
//! Note that we support multi-value returns in two ways. First, we allow for
//! multiple return-value registers. Second, if teh appropriate flag is set, we
//! support the SpiderMonkey Wasm ABI. For details of the multi-value return
//! ABI, see:
//!
//! <https://searchfox.org/mozilla-central/rev/bc3600def806859c31b2c7ac06e3d69271052a89/js/src/wasm/WasmStubs.h#134>
//!
//! In brief:
//! - Return values are processed in *reverse* order.
//! - The first return value in this order (so the last return) goes into the
//! ordinary return register.
//! - Any further returns go in a struct-return area, allocated upwards (in
//! address order) during the reverse traversal.
//! - This struct-return area is provided by the caller, and a pointer to its
//! start is passed as an invisible last (extra) argument. Normally the caller
//! will allocate this area on the stack. When we generate calls, we place it
//! just above the on-stack argument area.
//! - So, for example, a function returning 4 i64's (v0, v1, v2, v3), with no
//! formal arguments, would:
//! - Accept a pointer `P` to the struct return area as a hidden argument in the
//! first argument register on entry.
//! - Return v3 in the one and only return-value register.
//! - Return v2 in memory at `[P]`.
//! - Return v1 in memory at `[P+8]`.
//! - Return v0 in memory at `[P+16]`.
//! We support multi-value returns by using multiple return-value
//! registers. In some cases this is an extension of the base system
//! ABI. See each platform's `abi.rs` implementation for details.
use super::abi::*;
use crate::binemit::StackMap;
@@ -212,14 +190,6 @@ pub enum ABIArg {
}
impl ABIArg {
/// Get the purpose of this arg.
fn get_purpose(&self) -> ir::ArgumentPurpose {
match self {
&ABIArg::Slots { purpose, .. } => purpose,
&ABIArg::StructArg { purpose, .. } => purpose,
}
}
/// Is this a StructArg?
fn is_struct_arg(&self) -> bool {
match self {
@@ -367,10 +337,6 @@ pub trait ABIMachineSpec {
/// Generate a return instruction.
fn gen_ret(rets: Vec<Reg>) -> Self::I;
/// Generate an "epilogue placeholder" instruction, recognized by lowering
/// when using the Baldrdash ABI.
fn gen_epilogue_placeholder() -> Self::I;
/// Generate an add-with-immediate. Note that even if this uses a scratch
/// register, it must satisfy two requirements:
///
@@ -734,8 +700,7 @@ pub struct ABICalleeImpl<M: ABIMachineSpec> {
/// Total number of spillslots, including for 'dynamic' types, from regalloc.
spillslots: Option<usize>,
/// Storage allocated for the fixed part of the stack frame. This is
/// usually the same as the total frame size below, except in the case
/// of the baldrdash calling convention.
/// usually the same as the total frame size below.
fixed_frame_storage_size: u32,
/// "Total frame size", as defined by "distance between FP and nominal SP".
/// Some items are pushed below nominal SP, so the function may actually use
@@ -803,7 +768,6 @@ impl<M: ABIMachineSpec> ABICalleeImpl<M> {
call_conv == isa::CallConv::SystemV
|| call_conv == isa::CallConv::Fast
|| call_conv == isa::CallConv::Cold
|| call_conv.extends_baldrdash()
|| call_conv.extends_windows_fastcall()
|| call_conv == isa::CallConv::AppleAarch64
|| call_conv == isa::CallConv::WasmtimeSystemV
@@ -1164,14 +1128,8 @@ impl<M: ABIMachineSpec> ABICallee for ABICalleeImpl<M> {
insts
}
fn arg_is_needed_in_body(&self, idx: usize) -> bool {
match self.sig.args[idx].get_purpose() {
// Special Baldrdash-specific pseudo-args that are present only to
// fill stack slots. Won't ever be used as ordinary values in the
// body.
ir::ArgumentPurpose::CalleeTLS | ir::ArgumentPurpose::CallerTLS => false,
_ => true,
}
fn arg_is_needed_in_body(&self, _idx: usize) -> bool {
true
}
fn gen_copy_regs_to_retval(
@@ -1296,10 +1254,6 @@ impl<M: ABIMachineSpec> ABICallee for ABICalleeImpl<M> {
M::gen_ret(rets)
}
fn gen_epilogue_placeholder(&self) -> Self::I {
M::gen_epilogue_placeholder()
}
fn set_num_spillslots(&mut self, slots: usize) {
self.spillslots = Some(slots);
}
@@ -1400,14 +1354,7 @@ impl<M: ABIMachineSpec> ABICallee for ABICalleeImpl<M> {
fn gen_prologue(&mut self) -> SmallInstVec<Self::I> {
let bytes = M::word_bytes();
let mut total_stacksize = self.stackslots_size + bytes * self.spillslots.unwrap() as u32;
if self.call_conv.extends_baldrdash() {
debug_assert!(
!self.flags.enable_probestack(),
"baldrdash does not expect cranelift to emit stack probes"
);
total_stacksize += self.flags.baldrdash_prologue_words() as u32 * bytes;
}
let total_stacksize = self.stackslots_size + bytes * self.spillslots.unwrap() as u32;
let mask = M::stack_align(self.call_conv) - 1;
let total_stacksize = (total_stacksize + mask) & !mask; // 16-align the stack.
let clobbered_callee_saves = M::get_clobbered_callee_saves(
@@ -1418,36 +1365,34 @@ impl<M: ABIMachineSpec> ABICallee for ABICalleeImpl<M> {
);
let mut insts = smallvec![];
if !self.call_conv.extends_baldrdash() {
self.fixed_frame_storage_size += total_stacksize;
self.setup_frame = self.flags.preserve_frame_pointers()
|| M::is_frame_setup_needed(
self.is_leaf,
self.stack_args_size(),
clobbered_callee_saves.len(),
self.fixed_frame_storage_size,
);
insts.extend(
M::gen_debug_frame_info(self.call_conv, &self.flags, &self.isa_flags).into_iter(),
self.fixed_frame_storage_size += total_stacksize;
self.setup_frame = self.flags.preserve_frame_pointers()
|| M::is_frame_setup_needed(
self.is_leaf,
self.stack_args_size(),
clobbered_callee_saves.len(),
self.fixed_frame_storage_size,
);
if self.setup_frame {
// set up frame
insts.extend(M::gen_prologue_frame_setup(&self.flags).into_iter());
}
insts.extend(
M::gen_debug_frame_info(self.call_conv, &self.flags, &self.isa_flags).into_iter(),
);
// Leaf functions with zero stack don't need a stack check if one's
// specified, otherwise always insert the stack check.
if total_stacksize > 0 || !self.is_leaf {
if let Some((reg, stack_limit_load)) = &self.stack_limit {
insts.extend(stack_limit_load.clone());
self.insert_stack_check(*reg, total_stacksize, &mut insts);
}
if let Some(min_frame) = &self.probestack_min_frame {
if total_stacksize >= *min_frame {
insts.extend(M::gen_probestack(total_stacksize));
}
if self.setup_frame {
// set up frame
insts.extend(M::gen_prologue_frame_setup(&self.flags).into_iter());
}
// Leaf functions with zero stack don't need a stack check if one's
// specified, otherwise always insert the stack check.
if total_stacksize > 0 || !self.is_leaf {
if let Some((reg, stack_limit_load)) = &self.stack_limit {
insts.extend(stack_limit_load.clone());
self.insert_stack_check(*reg, total_stacksize, &mut insts);
}
if let Some(min_frame) = &self.probestack_min_frame {
if total_stacksize >= *min_frame {
insts.extend(M::gen_probestack(total_stacksize));
}
}
}
@@ -1497,17 +1442,15 @@ impl<M: ABIMachineSpec> ABICallee for ABICalleeImpl<M> {
// the CFG, so early returns in the middle of function bodies would cause an incorrect
// offset for the rest of the body.
if !self.call_conv.extends_baldrdash() {
if self.setup_frame {
insts.extend(M::gen_epilogue_frame_restore(&self.flags));
}
// This `ret` doesn't need any return registers attached
// because we are post-regalloc and don't need to
// represent the implicit uses anymore.
insts.push(M::gen_ret(vec![]));
if self.setup_frame {
insts.extend(M::gen_epilogue_frame_restore(&self.flags));
}
// This `ret` doesn't need any return registers attached
// because we are post-regalloc and don't need to
// represent the implicit uses anymore.
insts.push(M::gen_ret(vec![]));
trace!("Epilogue: {:?}", insts);
insts
}

19
cranelift/codegen/src/machinst/blockorder.rs
View File

@@ -223,7 +223,6 @@ impl BlockLoweringOrder {
// Cache the block successors to avoid re-examining branches below.
let mut block_succs: SmallVec<[(Inst, usize, Block); 128]> = SmallVec::new();
let mut block_succ_range = SecondaryMap::with_default((0, 0));
let mut fallthrough_return_block = None;
for block in f.layout.blocks() {
let block_succ_start = block_succs.len();
let mut succ_idx = 0;
@@ -241,11 +240,6 @@ impl BlockLoweringOrder {
// Implicit output edge for any return.
block_out_count[block] += 1;
}
if f.dfg[inst].opcode() == Opcode::FallthroughReturn {
// Fallthrough return block must come last.
debug_assert!(fallthrough_return_block == None);
fallthrough_return_block = Some(block);
}
}
}
// Implicit input edge for entry block.
@@ -396,17 +390,11 @@ impl BlockLoweringOrder {
});
}
let mut deferred_last = None;
while !stack.is_empty() {
let stack_entry = stack.last_mut().unwrap();
let range = stack_entry.succs;
if stack_entry.cur_succ == range.0 {
let orig_block = stack_entry.this.orig_block();
if orig_block.is_some() && orig_block == fallthrough_return_block {
deferred_last = Some((stack_entry.this, range));
} else {
postorder.push((stack_entry.this, range));
}
postorder.push((stack_entry.this, range));
stack.pop();
} else {
// Heuristic: chase the children in reverse. This puts the first
@@ -431,10 +419,7 @@ impl BlockLoweringOrder {
}
postorder.reverse();
let mut rpo = postorder;
if let Some(d) = deferred_last {
rpo.push(d);
}
let rpo = postorder;
// Step 3: now that we have RPO, build the BlockIndex/BB fwd/rev maps.
let mut lowered_order = vec![];

1
cranelift/codegen/src/machinst/buffer.rs
View File

@@ -1672,7 +1672,6 @@ mod test {
buf.bind_label(label(1));
let inst = Inst::Udf {
use_allocated_encoding: true,
trap_code: TrapCode::Interrupt,
};
inst.emit(&[], &mut buf, &info, &mut state);

5
cranelift/codegen/src/machinst/isle.rs
View File

@@ -615,11 +615,6 @@ macro_rules! isle_prelude_methods {
}
}
#[inline]
fn is_not_baldrdash_call_conv(&mut self) -> Option<bool> {
Some(!self.lower_ctx.abi().call_conv().extends_baldrdash())
}
#[inline]
fn func_ref_data(&mut self, func_ref: FuncRef) -> (SigRef, ExternalName, RelocDistance) {
let funcdata = &self.lower_ctx.dfg().ext_funcs[func_ref];

20
cranelift/codegen/src/machinst/lower.rs
View File

@@ -475,11 +475,6 @@ fn alloc_vregs<I: VCodeInst>(
Ok(regs)
}
enum GenerateReturn {
Yes,
No,
}
impl<'func, I: VCodeInst> Lower<'func, I> {
/// Prepare a new lowering context for the given IR function.
pub fn new(
@@ -752,7 +747,7 @@ impl<'func, I: VCodeInst> Lower<'func, I> {
}
}
fn gen_retval_setup(&mut self, gen_ret_inst: GenerateReturn) {
fn gen_retval_setup(&mut self) {
let retval_regs = self.retval_regs.clone();
for (i, regs) in retval_regs.into_iter().enumerate() {
let regs = writable_value_regs(regs);
@@ -765,10 +760,7 @@ impl<'func, I: VCodeInst> Lower<'func, I> {
self.emit(insn);
}
}
let inst = match gen_ret_inst {
GenerateReturn::Yes => self.vcode.abi().gen_ret(),
GenerateReturn::No => self.vcode.abi().gen_epilogue_placeholder(),
};
let inst = self.vcode.abi().gen_ret();
self.emit(inst);
// Hack: generate a virtual instruction that uses vmctx in
@@ -867,13 +859,7 @@ impl<'func, I: VCodeInst> Lower<'func, I> {
}
if data.opcode().is_return() {
// Return: handle specially, using ABI-appropriate sequence.
let gen_ret = if data.opcode() == Opcode::Return {
GenerateReturn::Yes
} else {
debug_assert!(data.opcode() == Opcode::FallthroughReturn);
GenerateReturn::No
};
self.gen_retval_setup(gen_ret);
self.gen_retval_setup();
}
let loc = self.srcloc(inst);

3
cranelift/codegen/src/machinst/mod.rs
View File

@@ -96,9 +96,6 @@ pub trait MachInst: Clone + Debug {
/// (ret/uncond/cond) and target if applicable.
fn is_term(&self) -> MachTerminator;
/// Returns true if the instruction is an epilogue placeholder.
fn is_epilogue_placeholder(&self) -> bool;
/// Should this instruction be included in the clobber-set?
fn is_included_in_clobbers(&self) -> bool {
true