cranelift: Fix cls for small types on aarch64 (#4305)

The previous `cls` code was producing wrong results when fed with a -1 i8.

The fix here is to sign extend instead of zero extending since we want
to keep the sign bit as one in order for it to be counted correctly
in the cls instruction

This also merges the interpreter only tests now that aarch64
correctly supports this instruction

cranelift/filetests/filetests/runtests/cls-interpret.clif

@@ -1,23 +0,0 @@
-test interpret
-; aarch64 yields cls_i8(1) == 30, which is incorrect
-
-function %cls_i8(i8) -> i8 {
-block0(v0: i8):
-    v1 = cls v0
-    return v1
-}
-; run: %cls_i8(1) == 6
-; run: %cls_i8(0x40) == 0
-; run: %cls_i8(-1) == 7
-; run: %cls_i8(0) == 7
-
-function %cls_i16(i16) -> i16 {
-block0(v0: i16):
-    v1 = cls v0
-    return v1
-}
-; run: %cls_i16(1) == 14
-; run: %cls_i16(0x4000) == 0
-; run: %cls_i16(-1) == 15
-; run: %cls_i16(0) == 15
-

cranelift/filetests/filetests/runtests/cls.clif

@@ -3,6 +3,26 @@ test run
 target aarch64
 ; not implemented on `x86_64`
 
+function %cls_i8(i8) -> i8 {
+block0(v0: i8):
+    v1 = cls v0
+    return v1
+}
+; run: %cls_i8(1) == 6
+; run: %cls_i8(0x40) == 0
+; run: %cls_i8(-1) == 7
+; run: %cls_i8(0) == 7
+
+function %cls_i16(i16) -> i16 {
+block0(v0: i16):
+    v1 = cls v0
+    return v1
+}
+; run: %cls_i16(1) == 14
+; run: %cls_i16(0x4000) == 0
+; run: %cls_i16(-1) == 15
+; run: %cls_i16(0) == 15
+
 function %cls_i32(i32) -> i32 {
 block0(v0: i32):
     v1 = cls v0