cranelift: Fix cls for small types on aarch64 (#4305)

The previous `cls` code was producing wrong results when fed with a -1 i8.

The fix here is to sign extend instead of zero extending since we want
to keep the sign bit as one in order for it to be counted correctly
in the cls instruction

This also merges the interpreter only tests now that aarch64
correctly supports this instruction
This commit is contained in:
Afonso Bordado
2022-06-27 23:55:02 +01:00
committed by GitHub
parent aef53784ec
commit 42d4f97b78
4 changed files with 24 additions and 28 deletions

View File

@@ -121,7 +121,7 @@ block0(v0: i8):
}
; block0:
; uxtb w3, w0
; sxtb w3, w0
; cls w5, w3
; sub w0, w5, #24
; ret
@@ -133,7 +133,7 @@ block0(v0: i16):
}
; block0:
; uxth w3, w0
; sxth w3, w0
; cls w5, w3
; sub w0, w5, #16
; ret
@@ -928,4 +928,3 @@ block0(v0: i128, v1: i128):
; csel x0, x12, x6, ne
; csel x1, x4, x12, ne
; ret