Add Intel encodings for the icmp instruction.
This instruction returns a `b1` value which is represented as the output of a setCC instruction which is the low 8 bits of a GPR register. Use a cmp+setCC macro recipe to encode this. That is not ideal, but we can't represent CPU flags yet.
This commit is contained in:
@@ -174,3 +174,11 @@ I32.enc(base.brnz.i32, *r.tjccb(0x75))
|
||||
I64.enc(base.brnz.i64, *r.tjccb.rex(0x75, w=1))
|
||||
I64.enc(base.brnz.i32, *r.tjccb.rex(0x75))
|
||||
I64.enc(base.brnz.i32, *r.tjccb(0x75))
|
||||
|
||||
#
|
||||
# Comparisons
|
||||
#
|
||||
I32.enc(base.icmp.i32, *r.icscc(0x39))
|
||||
I64.enc(base.icmp.i64, *r.icscc.rex(0x39, w=1))
|
||||
I64.enc(base.icmp.i32, *r.icscc.rex(0x39))
|
||||
I64.enc(base.icmp.i32, *r.icscc(0x39))
|
||||
|
||||
Reference in New Issue
Block a user