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Port flag-based ops to ISLE (AArch64) (#4942)

Browse Source 
Ported the existing implementations of the following opcodes for AArch64
to ISLE:
- `Trueif`
- `Trueff`
- `Trapif`
- `Trapff`
- `Select`
- `Selectif`
- `SelectifSpectreGuard`

Copyright (c) 2022 Arm Limited
This commit is contained in:
Damian Heaton
2022-09-22 23:44:32 +01:00
committed by GitHub
parent 89abd80c3c
commit 3f8cccfb59
12 changed files with 1641 additions and 190 deletions
Download Patch File Download Diff File Expand all files Collapse all files

737
cranelift/filetests/filetests/isa/aarch64/condops.clif
View File

@@ -2,6 +2,48 @@ test compile precise-output
set unwind_info=false
target aarch64
function %f(i8, i8, i8) -> i8 {
block0(v0: i8, v1: i8, v2: i8):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i8 eq v4, v1, v2
return v5
}
; block0:
; uxtb w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; ret
function %f(i8, i16, i16) -> i16 {
block0(v0: i8, v1: i16, v2: i16):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i16 eq v4, v1, v2
return v5
}
; block0:
; uxtb w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; ret
function %f(i8, i32, i32) -> i32 {
block0(v0: i8, v1: i32, v2: i32):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i32 eq v4, v1, v2
return v5
}
; block0:
; uxtb w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; ret
function %f(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):
v3 = iconst.i8 42
@@ -11,11 +53,690 @@ block0(v0: i8, v1: i64, v2: i64):
}
; block0:
; uxtb w6, w0
; subs wzr, w6, #42
; uxtb w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; ret
function %f(i8, i128, i128) -> i128 {
block0(v0: i8, v1: i128, v2: i128):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i128 eq v4, v1, v2
return v5
}
; block0:
; uxtb w8, w0
; subs wzr, w8, #42
; csel x0, x2, x4, eq
; csel x1, x3, x5, eq
; ret
function %f(i16, i8, i8) -> i8 {
block0(v0: i16, v1: i8, v2: i8):
v3 = iconst.i16 42
v4 = ifcmp v0, v3
v5 = selectif.i8 eq v4, v1, v2
return v5
}
; block0:
; uxth w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; ret
function %f(i16, i16, i16) -> i16 {
block0(v0: i16, v1: i16, v2: i16):
v3 = iconst.i16 42
v4 = ifcmp v0, v3
v5 = selectif.i16 eq v4, v1, v2
return v5
}
; block0:
; uxth w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; ret
function %f(i16, i32, i32) -> i32 {
block0(v0: i16, v1: i32, v2: i32):
v3 = iconst.i16 42
v4 = ifcmp v0, v3
v5 = selectif.i32 eq v4, v1, v2
return v5
}
; block0:
; uxth w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; ret
function %f(i16, i64, i64) -> i64 {
block0(v0: i16, v1: i64, v2: i64):
v3 = iconst.i16 42
v4 = ifcmp v0, v3
v5 = selectif.i64 eq v4, v1, v2
return v5
}
; block0:
; uxth w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; ret
function %f(i16, i128, i128) -> i128 {
block0(v0: i16, v1: i128, v2: i128):
v3 = iconst.i16 42
v4 = ifcmp v0, v3
v5 = selectif.i128 eq v4, v1, v2
return v5
}
; block0:
; uxth w8, w0
; subs wzr, w8, #42
; csel x0, x2, x4, eq
; csel x1, x3, x5, eq
; ret
function %f(i32, i8, i8) -> i8 {
block0(v0: i32, v1: i8, v2: i8):
v3 = iconst.i32 42
v4 = ifcmp v0, v3
v5 = selectif.i8 eq v4, v1, v2
return v5
}
; block0:
; subs wzr, w0, #42
; csel x0, x1, x2, eq
; ret
function %f(i32, i16, i16) -> i16 {
block0(v0: i32, v1: i16, v2: i16):
v3 = iconst.i32 42
v4 = ifcmp v0, v3
v5 = selectif.i16 eq v4, v1, v2
return v5
}
; block0:
; subs wzr, w0, #42
; csel x0, x1, x2, eq
; ret
function %f(i32, i32, i32) -> i32 {
block0(v0: i32, v1: i32, v2: i32):
v3 = iconst.i32 42
v4 = ifcmp v0, v3
v5 = selectif.i32 eq v4, v1, v2
return v5
}
; block0:
; subs wzr, w0, #42
; csel x0, x1, x2, eq
; ret
function %f(i32, i64, i64) -> i64 {
block0(v0: i32, v1: i64, v2: i64):
v3 = iconst.i32 42
v4 = ifcmp v0, v3
v5 = selectif.i64 eq v4, v1, v2
return v5
}
; block0:
; subs wzr, w0, #42
; csel x0, x1, x2, eq
; ret
function %f(i32, i128, i128) -> i128 {
block0(v0: i32, v1: i128, v2: i128):
v3 = iconst.i32 42
v4 = ifcmp v0, v3
v5 = selectif.i128 eq v4, v1, v2
return v5
}
; block0:
; subs wzr, w0, #42
; csel x0, x2, x4, eq
; csel x1, x3, x5, eq
; ret
function %f(i64, i8, i8) -> i8 {
block0(v0: i64, v1: i8, v2: i8):
v3 = iconst.i64 42
v4 = ifcmp v0, v3
v5 = selectif.i8 eq v4, v1, v2
return v5
}
; block0:
; subs xzr, x0, #42
; csel x0, x1, x2, eq
; ret
function %f(i64, i16, i16) -> i16 {
block0(v0: i64, v1: i16, v2: i16):
v3 = iconst.i64 42
v4 = ifcmp v0, v3
v5 = selectif.i16 eq v4, v1, v2
return v5
}
; block0:
; subs xzr, x0, #42
; csel x0, x1, x2, eq
; ret
function %f(i64, i32, i32) -> i32 {
block0(v0: i64, v1: i32, v2: i32):
v3 = iconst.i64 42
v4 = ifcmp v0, v3
v5 = selectif.i32 eq v4, v1, v2
return v5
}
; block0:
; subs xzr, x0, #42
; csel x0, x1, x2, eq
; ret
function %f(i64, i64, i64) -> i64 {
block0(v0: i64, v1: i64, v2: i64):
v3 = iconst.i64 42
v4 = ifcmp v0, v3
v5 = selectif.i64 eq v4, v1, v2
return v5
}
; block0:
; subs xzr, x0, #42
; csel x0, x1, x2, eq
; ret
function %f(i64, i128, i128) -> i128 {
block0(v0: i64, v1: i128, v2: i128):
v3 = iconst.i64 42
v4 = ifcmp v0, v3
v5 = selectif.i128 eq v4, v1, v2
return v5
}
; block0:
; subs xzr, x0, #42
; csel x0, x2, x4, eq
; csel x1, x3, x5, eq
; ret
function %f(i128, i8, i8) -> i8 {
block0(v0: i128, v1: i8, v2: i8):
v3 = iconst.i128 42
v4 = ifcmp v0, v3
v5 = selectif.i8 eq v4, v1, v2
return v5
}
; block0:
; movz x6, #42
; movz x8, #0
; subs xzr, x0, x6
; ccmp x1, x8, #nzcv, eq
; csel x0, x2, x3, eq
; ret
function %f(i128, i16, i16) -> i16 {
block0(v0: i128, v1: i16, v2: i16):
v3 = iconst.i128 42
v4 = ifcmp v0, v3
v5 = selectif.i16 eq v4, v1, v2
return v5
}
; block0:
; movz x6, #42
; movz x8, #0
; subs xzr, x0, x6
; ccmp x1, x8, #nzcv, eq
; csel x0, x2, x3, eq
; ret
function %f(i128, i32, i32) -> i32 {
block0(v0: i128, v1: i32, v2: i32):
v3 = iconst.i128 42
v4 = ifcmp v0, v3
v5 = selectif.i32 eq v4, v1, v2
return v5
}
; block0:
; movz x6, #42
; movz x8, #0
; subs xzr, x0, x6
; ccmp x1, x8, #nzcv, eq
; csel x0, x2, x3, eq
; ret
function %f(i128, i64, i64) -> i64 {
block0(v0: i128, v1: i64, v2: i64):
v3 = iconst.i128 42
v4 = ifcmp v0, v3
v5 = selectif.i64 eq v4, v1, v2
return v5
}
; block0:
; movz x6, #42
; movz x8, #0
; subs xzr, x0, x6
; ccmp x1, x8, #nzcv, eq
; csel x0, x2, x3, eq
; ret
function %f(i128, i128, i128) -> i128 {
block0(v0: i128, v1: i128, v2: i128):
v3 = iconst.i128 42
v4 = ifcmp v0, v3
v5 = selectif.i128 eq v4, v1, v2
return v5
}
; block0:
; movz x9, #42
; movz x11, #0
; subs xzr, x0, x9
; ccmp x1, x11, #nzcv, eq
; csel x0, x2, x4, eq
; csel x1, x3, x5, eq
; ret
function %f(i8, i8, i8) -> i8 {
block0(v0: i8, v1: i8, v2: i8):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i8 eq v4, v1, v2
return v5
}
; block0:
; uxtb w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i8, i16, i16) -> i16 {
block0(v0: i8, v1: i16, v2: i16):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i16 eq v4, v1, v2
return v5
}
; block0:
; uxtb w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i8, i32, i32) -> i32 {
block0(v0: i8, v1: i32, v2: i32):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i32 eq v4, v1, v2
return v5
}
; block0:
; uxtb w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i64 eq v4, v1, v2
return v5
}
; block0:
; uxtb w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i8, i128, i128) -> i128 {
block0(v0: i8, v1: i128, v2: i128):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i128 eq v4, v1, v2
return v5
}
; block0:
; uxtb w8, w0
; subs wzr, w8, #42
; csel x0, x2, x4, eq
; csel x1, x3, x5, eq
; csdb
; ret
function %f(i16, i8, i8) -> i8 {
block0(v0: i16, v1: i8, v2: i8):
v3 = iconst.i16 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i8 eq v4, v1, v2
return v5
}
; block0:
; uxth w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i16, i16, i16) -> i16 {
block0(v0: i16, v1: i16, v2: i16):
v3 = iconst.i16 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i16 eq v4, v1, v2
return v5
}
; block0:
; uxth w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i16, i32, i32) -> i32 {
block0(v0: i16, v1: i32, v2: i32):
v3 = iconst.i16 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i32 eq v4, v1, v2
return v5
}
; block0:
; uxth w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i16, i64, i64) -> i64 {
block0(v0: i16, v1: i64, v2: i64):
v3 = iconst.i16 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i64 eq v4, v1, v2
return v5
}
; block0:
; uxth w5, w0
; subs wzr, w5, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i16, i128, i128) -> i128 {
block0(v0: i16, v1: i128, v2: i128):
v3 = iconst.i16 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i128 eq v4, v1, v2
return v5
}
; block0:
; uxth w8, w0
; subs wzr, w8, #42
; csel x0, x2, x4, eq
; csel x1, x3, x5, eq
; csdb
; ret
function %f(i32, i8, i8) -> i8 {
block0(v0: i32, v1: i8, v2: i8):
v3 = iconst.i32 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i8 eq v4, v1, v2
return v5
}
; block0:
; subs wzr, w0, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i32, i16, i16) -> i16 {
block0(v0: i32, v1: i16, v2: i16):
v3 = iconst.i32 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i16 eq v4, v1, v2
return v5
}
; block0:
; subs wzr, w0, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i32, i32, i32) -> i32 {
block0(v0: i32, v1: i32, v2: i32):
v3 = iconst.i32 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i32 eq v4, v1, v2
return v5
}
; block0:
; subs wzr, w0, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i32, i64, i64) -> i64 {
block0(v0: i32, v1: i64, v2: i64):
v3 = iconst.i32 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i64 eq v4, v1, v2
return v5
}
; block0:
; subs wzr, w0, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i32, i128, i128) -> i128 {
block0(v0: i32, v1: i128, v2: i128):
v3 = iconst.i32 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i128 eq v4, v1, v2
return v5
}
; block0:
; subs wzr, w0, #42
; csel x0, x2, x4, eq
; csel x1, x3, x5, eq
; csdb
; ret
function %f(i64, i8, i8) -> i8 {
block0(v0: i64, v1: i8, v2: i8):
v3 = iconst.i64 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i8 eq v4, v1, v2
return v5
}
; block0:
; subs xzr, x0, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i64, i16, i16) -> i16 {
block0(v0: i64, v1: i16, v2: i16):
v3 = iconst.i64 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i16 eq v4, v1, v2
return v5
}
; block0:
; subs xzr, x0, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i64, i32, i32) -> i32 {
block0(v0: i64, v1: i32, v2: i32):
v3 = iconst.i64 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i32 eq v4, v1, v2
return v5
}
; block0:
; subs xzr, x0, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i64, i64, i64) -> i64 {
block0(v0: i64, v1: i64, v2: i64):
v3 = iconst.i64 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i64 eq v4, v1, v2
return v5
}
; block0:
; subs xzr, x0, #42
; csel x0, x1, x2, eq
; csdb
; ret
function %f(i64, i128, i128) -> i128 {
block0(v0: i64, v1: i128, v2: i128):
v3 = iconst.i64 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i128 eq v4, v1, v2
return v5
}
; block0:
; subs xzr, x0, #42
; csel x0, x2, x4, eq
; csel x1, x3, x5, eq
; csdb
; ret
function %f(i128, i8, i8) -> i8 {
block0(v0: i128, v1: i8, v2: i8):
v3 = iconst.i128 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i8 eq v4, v1, v2
return v5
}
; block0:
; movz x6, #42
; movz x8, #0
; subs xzr, x0, x6
; ccmp x1, x8, #nzcv, eq
; csel x0, x2, x3, eq
; csdb
; ret
function %f(i128, i16, i16) -> i16 {
block0(v0: i128, v1: i16, v2: i16):
v3 = iconst.i128 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i16 eq v4, v1, v2
return v5
}
; block0:
; movz x6, #42
; movz x8, #0
; subs xzr, x0, x6
; ccmp x1, x8, #nzcv, eq
; csel x0, x2, x3, eq
; csdb
; ret
function %f(i128, i32, i32) -> i32 {
block0(v0: i128, v1: i32, v2: i32):
v3 = iconst.i128 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i32 eq v4, v1, v2
return v5
}
; block0:
; movz x6, #42
; movz x8, #0
; subs xzr, x0, x6
; ccmp x1, x8, #nzcv, eq
; csel x0, x2, x3, eq
; csdb
; ret
function %f(i128, i64, i64) -> i64 {
block0(v0: i128, v1: i64, v2: i64):
v3 = iconst.i128 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i64 eq v4, v1, v2
return v5
}
; block0:
; movz x6, #42
; movz x8, #0
; subs xzr, x0, x6
; ccmp x1, x8, #nzcv, eq
; csel x0, x2, x3, eq
; csdb
; ret
function %f(i128, i128, i128) -> i128 {
block0(v0: i128, v1: i128, v2: i128):
v3 = iconst.i128 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i128 eq v4, v1, v2
return v5
}
; block0:
; movz x9, #42
; movz x11, #0
; subs xzr, x0, x9
; ccmp x1, x11, #nzcv, eq
; csel x0, x2, x4, eq
; csel x1, x3, x5, eq
; csdb
; ret
function %g(i8) -> b1 {
block0(v0: i8):
v3 = iconst.i8 42
@@ -25,8 +746,8 @@ block0(v0: i8):
}
; block0:
; uxtb w4, w0
; subs wzr, w4, #42
; uxtb w3, w0
; subs wzr, w3, #42
; cset x0, eq
; ret
@@ -49,8 +770,8 @@ block0(v0: b1, v1: i8, v2: i8):
}
; block0:
; and w6, w0, #1
; subs wzr, w6, wzr
; and w5, w0, #1
; subs wzr, w5, wzr
; csel x0, x1, x2, ne
; ret
@@ -74,8 +795,8 @@ block0(v0: b1, v1: i128, v2: i128):
}
; block0:
; and w10, w0, #1
; subs wzr, w10, wzr
; and w8, w0, #1
; subs wzr, w8, wzr
; csel x0, x2, x4, ne
; csel x1, x3, x5, ne
; ret

6
cranelift/filetests/filetests/isa/aarch64/heap_addr.clif
View File

@@ -21,8 +21,8 @@ block0(v0: i64, v1: i32):
; b.ls label1 ; b label2
; block1:
; add x11, x0, x1, UXTW
; subs xzr, x9, x10
; movz x12, #0
; subs xzr, x9, x10
; csel x0, x12, x11, hi
; csdb
; ret
@@ -44,9 +44,9 @@ block0(v0: i64, v1: i32):
; b.ls label1 ; b label2
; block1:
; add x9, x0, x1, UXTW
; movz x8, #0
; subs xzr, x7, #65536
; movz x10, #0
; csel x0, x10, x9, hi
; csel x0, x8, x9, hi
; csdb
; ret
; block2:

1
cranelift/filetests/filetests/isa/aarch64/traps.clif
View File

@@ -17,6 +17,7 @@ block0(v0: i64, v1: i64):
}
; block0:
; adds x3, x0, x1
; b.hs 8 ; udf
; ret

1
cranelift/filetests/filetests/runtests/select.clif
View File

@@ -1,5 +1,6 @@
test interpret
test run
target aarch64
target s390x
target x86_64

316
cranelift/filetests/filetests/runtests/selectif-spectre-guard.clif Normal file
View File

@@ -0,0 +1,316 @@
;; the interpreter does not support `selectif_spectre_guard`.
test run
set enable_llvm_abi_extensions=true
target aarch64
target s390x
target x86_64
function %selectif_spectre_guard_i8_eq(i8, i8, i8) -> i8 {
block0(v0: i8, v1: i8, v2: i8):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i8 eq v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i8_eq(0, 32, 255) == 255
; run: %selectif_spectre_guard_i8_eq(255, 32, -1) == -1
; run: %selectif_spectre_guard_i8_eq(42, 32, 255) == 32
function %selectif_spectre_guard_i16_eq(i8, i16, i16) -> i16 {
block0(v0: i8, v1: i16, v2: i16):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i16 eq v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i16_eq(0, 32, 65535) == 65535
; run: %selectif_spectre_guard_i16_eq(255, 32, -1) == -1
; run: %selectif_spectre_guard_i16_eq(42, 32, 65535) == 32
function %selectif_spectre_guard_i32_eq(i8, i32, i32) -> i32 {
block0(v0: i8, v1: i32, v2: i32):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i32 eq v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i32_eq(0, 32, 4294967295) == 4294967295
; run: %selectif_spectre_guard_i32_eq(255, 32, -1) == -1
; run: %selectif_spectre_guard_i32_eq(42, 32, 4294967295) == 32
function %selectif_spectre_guard_i64_eq(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i64 eq v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i64_eq(0, 32, 18446744073709551615) == 18446744073709551615
; run: %selectif_spectre_guard_i64_eq(255, 32, -1) == -1
; run: %selectif_spectre_guard_i64_eq(42, 32, 18446744073709551615) == 32
function %selectif_spectre_guard_i128_eq(i8, i128, i128) -> i128 {
block0(v0: i8, v1: i128, v2: i128):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i128 eq v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i128_eq(0, 32, 19000000000000000000) == 19000000000000000000
; run: %selectif_spectre_guard_i128_eq(255, 32, -1) == -1
; run: %selectif_spectre_guard_i128_eq(42, 32, 19000000000000000000) == 32
function %selectif_spectre_guard_i8_ult(i8, i8, i8) -> i8 {
block0(v0: i8, v1: i8, v2: i8):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i8 ult v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i8_ult(0, 32, 255) == 32
; run: %selectif_spectre_guard_i8_ult(255, 32, -1) == -1
; run: %selectif_spectre_guard_i8_ult(42, 32, 255) == 255
function %selectif_spectre_guard_i16_ult(i8, i16, i16) -> i16 {
block0(v0: i8, v1: i16, v2: i16):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i16 ult v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i16_ult(0, 32, 65535) == 32
; run: %selectif_spectre_guard_i16_ult(255, 32, -1) == -1
; run: %selectif_spectre_guard_i16_ult(42, 32, 65535) == 65535
function %selectif_spectre_guard_i32_ult(i8, i32, i32) -> i32 {
block0(v0: i8, v1: i32, v2: i32):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i32 ult v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i32_ult(0, 32, 4294967295) == 32
; run: %selectif_spectre_guard_i32_ult(255, 32, -1) == -1
; run: %selectif_spectre_guard_i32_ult(42, 32, 4294967295) == 4294967295
function %selectif_spectre_guard_i64_ult(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i64 ult v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i64_ult(0, 32, 18446744073709551615) == 32
; run: %selectif_spectre_guard_i64_ult(255, 32, -1) == -1
; run: %selectif_spectre_guard_i64_ult(42, 32, 18446744073709551615) == 18446744073709551615
function %selectif_spectre_guard_i128_ult(i8, i128, i128) -> i128 {
block0(v0: i8, v1: i128, v2: i128):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i128 ult v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i128_ult(0, 32, 19000000000000000000) == 32
; run: %selectif_spectre_guard_i128_ult(255, 32, -1) == -1
; run: %selectif_spectre_guard_i128_ult(42, 32, 19000000000000000000) == 19000000000000000000
function %selectif_spectre_guard_i8_ule(i8, i8, i8) -> i8 {
block0(v0: i8, v1: i8, v2: i8):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i8 ule v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i8_ule(0, 32, 255) == 32
; run: %selectif_spectre_guard_i8_ule(255, 32, -1) == -1
; run: %selectif_spectre_guard_i8_ule(42, 32, 255) == 32
function %selectif_spectre_guard_i16_ule(i8, i16, i16) -> i16 {
block0(v0: i8, v1: i16, v2: i16):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i16 ule v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i16_ule(0, 32, 65535) == 32
; run: %selectif_spectre_guard_i16_ule(255, 32, -1) == -1
; run: %selectif_spectre_guard_i16_ule(42, 32, 65535) == 32
function %selectif_spectre_guard_i32_ule(i8, i32, i32) -> i32 {
block0(v0: i8, v1: i32, v2: i32):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i32 ule v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i32_ule(0, 32, 4294967295) == 32
; run: %selectif_spectre_guard_i32_ule(255, 32, -1) == -1
; run: %selectif_spectre_guard_i32_ule(42, 32, 4294967295) == 32
function %selectif_spectre_guard_i64_ule(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i64 ule v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i64_ule(0, 32, 18446744073709551615) == 32
; run: %selectif_spectre_guard_i64_ule(255, 32, -1) == -1
; run: %selectif_spectre_guard_i64_ule(42, 32, 18446744073709551615) == 32
function %selectif_spectre_guard_i128_ule(i8, i128, i128) -> i128 {
block0(v0: i8, v1: i128, v2: i128):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i128 ule v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i128_ule(0, 32, 19000000000000000000) == 32
; run: %selectif_spectre_guard_i128_ule(255, 32, -1) == -1
; run: %selectif_spectre_guard_i128_ule(42, 32, 19000000000000000000) == 32
function %selectif_spectre_guard_i8_slt(i8, i8, i8) -> i8 {
block0(v0: i8, v1: i8, v2: i8):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i8 slt v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i8_slt(0, 32, 255) == 32
; run: %selectif_spectre_guard_i8_slt(-128, 32, -1) == 32
; run: %selectif_spectre_guard_i8_slt(42, 32, 255) == 255
function %selectif_spectre_guard_i16_slt(i8, i16, i16) -> i16 {
block0(v0: i8, v1: i16, v2: i16):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i16 slt v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i16_slt(0, 32, 65535) == 32
; run: %selectif_spectre_guard_i16_slt(-128, 32, -1) == 32
; run: %selectif_spectre_guard_i16_slt(42, 32, 65535) == 65535
function %selectif_spectre_guard_i32_slt(i8, i32, i32) -> i32 {
block0(v0: i8, v1: i32, v2: i32):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i32 slt v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i32_slt(0, 32, 4294967295) == 32
; run: %selectif_spectre_guard_i32_slt(-128, 32, -1) == 32
; run: %selectif_spectre_guard_i32_slt(42, 32, 4294967295) == 4294967295
function %selectif_spectre_guard_i64_slt(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i64 slt v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i64_slt(0, 32, 18446744073709551615) == 32
; run: %selectif_spectre_guard_i64_slt(-128, 32, -1) == 32
; run: %selectif_spectre_guard_i64_slt(42, 32, 18446744073709551615) == 18446744073709551615
function %selectif_spectre_guard_i128_slt(i8, i128, i128) -> i128 {
block0(v0: i8, v1: i128, v2: i128):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i128 slt v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i128_slt(0, 32, 19000000000000000000) == 32
; run: %selectif_spectre_guard_i128_slt(-128, 32, -1) == 32
; run: %selectif_spectre_guard_i128_slt(42, 32, 19000000000000000000) == 19000000000000000000
function %selectif_spectre_guard_i8_sle(i8, i8, i8) -> i8 {
block0(v0: i8, v1: i8, v2: i8):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i8 sle v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i8_sle(0, 32, 127) == 32
; run: %selectif_spectre_guard_i8_sle(-128, 32, -1) == 32
; run: %selectif_spectre_guard_i8_sle(127, 32, -1) == -1
; run: %selectif_spectre_guard_i8_sle(127, 32, 127) == 127
; run: %selectif_spectre_guard_i8_sle(42, 32, 127) == 32
function %selectif_spectre_guard_i16_sle(i8, i16, i16) -> i16 {
block0(v0: i8, v1: i16, v2: i16):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i16 sle v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i16_sle(0, 32, 65535) == 32
; run: %selectif_spectre_guard_i16_sle(-128, 32, -1) == 32
; run: %selectif_spectre_guard_i16_sle(127, 32, -1) == -1
; run: %selectif_spectre_guard_i16_sle(127, 32, 65535) == 65535
; run: %selectif_spectre_guard_i16_sle(42, 32, 65535) == 32
function %selectif_spectre_guard_i32_sle(i8, i32, i32) -> i32 {
block0(v0: i8, v1: i32, v2: i32):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i32 sle v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i32_sle(0, 32, 4294967295) == 32
; run: %selectif_spectre_guard_i32_sle(-128, 32, -1) == 32
; run: %selectif_spectre_guard_i32_sle(127, 32, -1) == -1
; run: %selectif_spectre_guard_i32_sle(127, 32, 4294967295) == 4294967295
; run: %selectif_spectre_guard_i32_sle(42, 32, 4294967295) == 32
function %selectif_spectre_guard_i64_sle(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i64 sle v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i64_sle(0, 32, 18446744073709551615) == 32
; run: %selectif_spectre_guard_i64_sle(-128, 32, -1) == 32
; run: %selectif_spectre_guard_i64_sle(127, 32, -1) == -1
; run: %selectif_spectre_guard_i64_sle(127, 32, 18446744073709551615) == 18446744073709551615
; run: %selectif_spectre_guard_i64_sle(42, 32, 18446744073709551615) == 32
function %selectif_spectre_guard_i128_sle(i8, i128, i128) -> i128 {
block0(v0: i8, v1: i128, v2: i128):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif_spectre_guard.i128 sle v4, v1, v2
return v5
}
; run: %selectif_spectre_guard_i128_sle(0, 32, 19000000000000000000) == 32
; run: %selectif_spectre_guard_i128_sle(-128, 32, -1) == 32
; run: %selectif_spectre_guard_i128_sle(127, 32, -1) == -1
; run: %selectif_spectre_guard_i128_sle(127, 32, 19000000000000000000) == 19000000000000000000
; run: %selectif_spectre_guard_i128_sle(42, 32, 19000000000000000000) == 32

316
cranelift/filetests/filetests/runtests/selectif.clif Normal file
View File

@@ -0,0 +1,316 @@
test interpret
test run
set enable_llvm_abi_extensions=true
target aarch64
target x86_64
; `selectif` panics on s390x.
function %selectif_i8_eq(i8, i8, i8) -> i8 {
block0(v0: i8, v1: i8, v2: i8):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i8 eq v4, v1, v2
return v5
}
; run: %selectif_i8_eq(0, 32, 255) == 255
; run: %selectif_i8_eq(255, 32, -1) == -1
; run: %selectif_i8_eq(42, 32, 255) == 32
function %selectif_i16_eq(i8, i16, i16) -> i16 {
block0(v0: i8, v1: i16, v2: i16):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i16 eq v4, v1, v2
return v5
}
; run: %selectif_i16_eq(0, 32, 65535) == 65535
; run: %selectif_i16_eq(255, 32, -1) == -1
; run: %selectif_i16_eq(42, 32, 65535) == 32
function %selectif_i32_eq(i8, i32, i32) -> i32 {
block0(v0: i8, v1: i32, v2: i32):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i32 eq v4, v1, v2
return v5
}
; run: %selectif_i32_eq(0, 32, 4294967295) == 4294967295
; run: %selectif_i32_eq(255, 32, -1) == -1
; run: %selectif_i32_eq(42, 32, 4294967295) == 32
function %selectif_i64_eq(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i64 eq v4, v1, v2
return v5
}
; run: %selectif_i64_eq(0, 32, 18446744073709551615) == 18446744073709551615
; run: %selectif_i64_eq(255, 32, -1) == -1
; run: %selectif_i64_eq(42, 32, 18446744073709551615) == 32
function %selectif_i128_eq(i8, i128, i128) -> i128 {
block0(v0: i8, v1: i128, v2: i128):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i128 eq v4, v1, v2
return v5
}
; run: %selectif_i128_eq(0, 32, 19000000000000000000) == 19000000000000000000
; run: %selectif_i128_eq(255, 32, -1) == -1
; run: %selectif_i128_eq(42, 32, 19000000000000000000) == 32
function %selectif_i8_ult(i8, i8, i8) -> i8 {
block0(v0: i8, v1: i8, v2: i8):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i8 ult v4, v1, v2
return v5
}
; run: %selectif_i8_ult(0, 32, 255) == 32
; run: %selectif_i8_ult(255, 32, -1) == -1
; run: %selectif_i8_ult(42, 32, 255) == 255
function %selectif_i16_ult(i8, i16, i16) -> i16 {
block0(v0: i8, v1: i16, v2: i16):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i16 ult v4, v1, v2
return v5
}
; run: %selectif_i16_ult(0, 32, 65535) == 32
; run: %selectif_i16_ult(255, 32, -1) == -1
; run: %selectif_i16_ult(42, 32, 65535) == 65535
function %selectif_i32_ult(i8, i32, i32) -> i32 {
block0(v0: i8, v1: i32, v2: i32):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i32 ult v4, v1, v2
return v5
}
; run: %selectif_i32_ult(0, 32, 4294967295) == 32
; run: %selectif_i32_ult(255, 32, -1) == -1
; run: %selectif_i32_ult(42, 32, 4294967295) == 4294967295
function %selectif_i64_ult(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i64 ult v4, v1, v2
return v5
}
; run: %selectif_i64_ult(0, 32, 18446744073709551615) == 32
; run: %selectif_i64_ult(255, 32, -1) == -1
; run: %selectif_i64_ult(42, 32, 18446744073709551615) == 18446744073709551615
function %selectif_i128_ult(i8, i128, i128) -> i128 {
block0(v0: i8, v1: i128, v2: i128):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i128 ult v4, v1, v2
return v5
}
; run: %selectif_i128_ult(0, 32, 19000000000000000000) == 32
; run: %selectif_i128_ult(255, 32, -1) == -1
; run: %selectif_i128_ult(42, 32, 19000000000000000000) == 19000000000000000000
function %selectif_i8_ule(i8, i8, i8) -> i8 {
block0(v0: i8, v1: i8, v2: i8):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i8 ule v4, v1, v2
return v5
}
; run: %selectif_i8_ule(0, 32, 255) == 32
; run: %selectif_i8_ule(255, 32, -1) == -1
; run: %selectif_i8_ule(42, 32, 255) == 32
function %selectif_i16_ule(i8, i16, i16) -> i16 {
block0(v0: i8, v1: i16, v2: i16):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i16 ule v4, v1, v2
return v5
}
; run: %selectif_i16_ule(0, 32, 65535) == 32
; run: %selectif_i16_ule(255, 32, -1) == -1
; run: %selectif_i16_ule(42, 32, 65535) == 32
function %selectif_i32_ule(i8, i32, i32) -> i32 {
block0(v0: i8, v1: i32, v2: i32):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i32 ule v4, v1, v2
return v5
}
; run: %selectif_i32_ule(0, 32, 4294967295) == 32
; run: %selectif_i32_ule(255, 32, -1) == -1
; run: %selectif_i32_ule(42, 32, 4294967295) == 32
function %selectif_i64_ule(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i64 ule v4, v1, v2
return v5
}
; run: %selectif_i64_ule(0, 32, 18446744073709551615) == 32
; run: %selectif_i64_ule(255, 32, -1) == -1
; run: %selectif_i64_ule(42, 32, 18446744073709551615) == 32
function %selectif_i128_ule(i8, i128, i128) -> i128 {
block0(v0: i8, v1: i128, v2: i128):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i128 ule v4, v1, v2
return v5
}
; run: %selectif_i128_ule(0, 32, 19000000000000000000) == 32
; run: %selectif_i128_ule(255, 32, -1) == -1
; run: %selectif_i128_ule(42, 32, 19000000000000000000) == 32
function %selectif_i8_slt(i8, i8, i8) -> i8 {
block0(v0: i8, v1: i8, v2: i8):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i8 slt v4, v1, v2
return v5
}
; run: %selectif_i8_slt(0, 32, 255) == 32
; run: %selectif_i8_slt(-128, 32, -1) == 32
; run: %selectif_i8_slt(42, 32, 255) == 255
function %selectif_i16_slt(i8, i16, i16) -> i16 {
block0(v0: i8, v1: i16, v2: i16):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i16 slt v4, v1, v2
return v5
}
; run: %selectif_i16_slt(0, 32, 65535) == 32
; run: %selectif_i16_slt(-128, 32, -1) == 32
; run: %selectif_i16_slt(42, 32, 65535) == 65535
function %selectif_i32_slt(i8, i32, i32) -> i32 {
block0(v0: i8, v1: i32, v2: i32):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i32 slt v4, v1, v2
return v5
}
; run: %selectif_i32_slt(0, 32, 4294967295) == 32
; run: %selectif_i32_slt(-128, 32, -1) == 32
; run: %selectif_i32_slt(42, 32, 4294967295) == 4294967295
function %selectif_i64_slt(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i64 slt v4, v1, v2
return v5
}
; run: %selectif_i64_slt(0, 32, 18446744073709551615) == 32
; run: %selectif_i64_slt(-128, 32, -1) == 32
; run: %selectif_i64_slt(42, 32, 18446744073709551615) == 18446744073709551615
function %selectif_i128_slt(i8, i128, i128) -> i128 {
block0(v0: i8, v1: i128, v2: i128):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i128 slt v4, v1, v2
return v5
}
; run: %selectif_i128_slt(0, 32, 19000000000000000000) == 32
; run: %selectif_i128_slt(-128, 32, -1) == 32
; run: %selectif_i128_slt(42, 32, 19000000000000000000) == 19000000000000000000
function %selectif_i8_sle(i8, i8, i8) -> i8 {
block0(v0: i8, v1: i8, v2: i8):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i8 sle v4, v1, v2
return v5
}
; run: %selectif_i8_sle(0, 32, 127) == 32
; run: %selectif_i8_sle(-128, 32, -1) == 32
; run: %selectif_i8_sle(127, 32, -1) == -1
; run: %selectif_i8_sle(127, 32, 127) == 127
; run: %selectif_i8_sle(42, 32, 127) == 32
function %selectif_i16_sle(i8, i16, i16) -> i16 {
block0(v0: i8, v1: i16, v2: i16):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i16 sle v4, v1, v2
return v5
}
; run: %selectif_i16_sle(0, 32, 65535) == 32
; run: %selectif_i16_sle(-128, 32, -1) == 32
; run: %selectif_i16_sle(127, 32, -1) == -1
; run: %selectif_i16_sle(127, 32, 65535) == 65535
; run: %selectif_i16_sle(42, 32, 65535) == 32
function %selectif_i32_sle(i8, i32, i32) -> i32 {
block0(v0: i8, v1: i32, v2: i32):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i32 sle v4, v1, v2
return v5
}
; run: %selectif_i32_sle(0, 32, 4294967295) == 32
; run: %selectif_i32_sle(-128, 32, -1) == 32
; run: %selectif_i32_sle(127, 32, -1) == -1
; run: %selectif_i32_sle(127, 32, 4294967295) == 4294967295
; run: %selectif_i32_sle(42, 32, 4294967295) == 32
function %selectif_i64_sle(i8, i64, i64) -> i64 {
block0(v0: i8, v1: i64, v2: i64):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i64 sle v4, v1, v2
return v5
}
; run: %selectif_i64_sle(0, 32, 18446744073709551615) == 32
; run: %selectif_i64_sle(-128, 32, -1) == 32
; run: %selectif_i64_sle(127, 32, -1) == -1
; run: %selectif_i64_sle(127, 32, 18446744073709551615) == 18446744073709551615
; run: %selectif_i64_sle(42, 32, 18446744073709551615) == 32
function %selectif_i128_sle(i8, i128, i128) -> i128 {
block0(v0: i8, v1: i128, v2: i128):
v3 = iconst.i8 42
v4 = ifcmp v0, v3
v5 = selectif.i128 sle v4, v1, v2
return v5
}
; run: %selectif_i128_sle(0, 32, 19000000000000000000) == 32
; run: %selectif_i128_sle(-128, 32, -1) == 32
; run: %selectif_i128_sle(127, 32, -1) == -1
; run: %selectif_i128_sle(127, 32, 19000000000000000000) == 19000000000000000000
; run: %selectif_i128_sle(42, 32, 19000000000000000000) == 32

110
cranelift/filetests/filetests/runtests/trueif-ff.clif Normal file
View File

@@ -0,0 +1,110 @@
test interpret
test run
target aarch64
; `true{if,ff}` not implemented on x86_64, and panics on s390x.
function %trueif_i8_eq(i8, i8) -> b1 {
block0(v0: i8, v1: i8):
v2 = ifcmp v0, v1
v3 = trueif eq v2
return v3
}
; run: %trueif_i8_eq(42, 42) == true
; run: %trueif_i8_eq(-1, 255) == true
; run: %trueif_i8_eq(255, 0) == false
; run: %trueif_i8_eq(32, 64) == false
function %trueif_i16_eq(i16, i16) -> b1 {
block0(v0: i16, v1: i16):
v2 = ifcmp v0, v1
v3 = trueif eq v2
return v3
}
; run: %trueif_i16_eq(42, 42) == true
; run: %trueif_i16_eq(-1, 65535) == true
; run: %trueif_i16_eq(65535, 0) == false
; run: %trueif_i16_eq(32, 64) == false
function %trueif_i32_eq(i32, i32) -> b1 {
block0(v0: i32, v1: i32):
v2 = ifcmp v0, v1
v3 = trueif eq v2
return v3
}
; run: %trueif_i32_eq(42, 42) == true
; run: %trueif_i32_eq(-1, 4294967295) == true
; run: %trueif_i32_eq(4294967295, 0) == false
; run: %trueif_i32_eq(32, 64) == false
function %trueif_i64_eq(i64, i64) -> b1 {
block0(v0: i64, v1: i64):
v2 = ifcmp v0, v1
v3 = trueif eq v2
return v3
}
; run: %trueif_i64_eq(42, 42) == true
; run: %trueif_i64_eq(-1, 18446744073709551615) == true
; run: %trueif_i64_eq(18446744073709551615, 0) == false
; run: %trueif_i64_eq(32, 64) == false
function %trueif_i128_eq(i128, i128) -> b1 {
block0(v0: i128, v1: i128):
v2 = ifcmp v0, v1
v3 = trueif eq v2
return v3
}
; run: %trueif_i128_eq(42, 42) == true
; run: %trueif_i128_eq(-1, 18446744073709551615) == false
; run: %trueif_i128_eq(19000000000000000000, 0) == false
; run: %trueif_i128_eq(32, 64) == false
function %trueff_f32_eq(f32, f32) -> b1 {
block0(v0: f32, v1: f32):
v2 = ffcmp v0, v1
v3 = trueff eq v2
return v3
}
; run: %trueff_f32_eq(0x42.0, 0x42.0) == true
; run: %trueff_f32_eq(-0x1.0, -0x1.0) == true
; run: %trueff_f32_eq(0x1.0, 0x0.0) == false
function %trueff_f64_eq(f64, f64) -> b1 {
block0(v0: f64, v1: f64):
v2 = ffcmp v0, v1
v3 = trueff eq v2
return v3
}
; run: %trueff_f64_eq(0x42.0, 0x42.0) == true
; run: %trueff_f64_eq(-0x1.0, -0x1.0) == true
; run: %trueff_f64_eq(0x1.0, 0x0.0) == false
function %trueff_f32_ne(f32, f32) -> b1 {
block0(v0: f32, v1: f32):
v2 = ffcmp v0, v1
v3 = trueff ne v2
return v3
}
; run: %trueff_f32_ne(0x42.0, 0x42.0) == false
; run: %trueff_f32_ne(-0x1.0, -0x1.0) == false
; run: %trueff_f32_ne(0x1.0, 0x0.0) == true
; run: %trueff_f32_ne(NaN, NaN) == true
function %trueff_f64_ne(f64, f64) -> b1 {
block0(v0: f64, v1: f64):
v2 = ffcmp v0, v1
v3 = trueff ne v2
return v3
}
; run: %trueff_f64_ne(0x42.0, 0x42.0) == false
; run: %trueff_f64_ne(-0x1.0, -0x1.0) == false
; run: %trueff_f64_ne(0x1.0, 0x0.0) == true
; run: %trueff_f64_ne(NaN, NaN) == true