Allow 64-bit vectors and implement for interpreter (#4509)

* Allow 64-bit vectors and implement for interpreter

The AArch64 backend already supports 64-bit vectors; this simply allows
instructions to make use of that.

Implemented support for 64-bit vectors within the interpreter to allow
interpret runtests to use them.

Copyright (c) 2022 Arm Limited

* Disable 64-bit SIMD `iaddpairwise` tests on s390x

Copyright (c) 2022 Arm Limited

cranelift/filetests/filetests/runtests/simd-iaddpairwise-64bit.clif

@@ -0,0 +1,26 @@
+test interpret
+test run
+target aarch64
+
+function %iaddp_i8x8(i8x8, i8x8) -> i8x8 {
+block0(v0: i8x8, v1: i8x8):
+  v2 = iadd_pairwise v0, v1
+  return v2
+}
+
+; run: %iaddp_i8x8([1 2 3 4 5 6 7 8], [9 10 11 12 13 14 15 16]) == [3 7 11 15 19 23 27 31]
+
+function %iaddp_i16x4(i16x4, i16x4) -> i16x4 {
+block0(v0: i16x4, v1: i16x4):
+    v2 = iadd_pairwise v0, v1
+    return v2
+}
+; run: %iaddp_i16x4([1 2 3 4], [100 99 98 97]) == [3 7 199 195]
+
+function %iaddp_i32x2(i32x2, i32x2) -> i32x2 {
+block0(v0: i32x2, v1: i32x2):
+    v2 = iadd_pairwise v0, v1
+    return v2
+}
+; run: %iaddp_i32x2([1 2], [5 6]) == [3 11]
+; run: %iaddp_i32x2([4294967290 5], [100 100]) == [4294967295 200]