Allow 64-bit vectors and implement for interpreter (#4509)

* Allow 64-bit vectors and implement for interpreter

The AArch64 backend already supports 64-bit vectors; this simply allows
instructions to make use of that.

Implemented support for 64-bit vectors within the interpreter to allow
interpret runtests to use them.

Copyright (c) 2022 Arm Limited

* Disable 64-bit SIMD `iaddpairwise` tests on s390x

Copyright (c) 2022 Arm Limited

cranelift/codegen/meta/src/shared/instructions.rs

@@ -3533,8 +3533,8 @@ pub(crate) fn define(
         "A SIMD vector type containing integer lanes 8, 16, or 32 bits wide.",
         TypeSetBuilder::new()
             .ints(8..32)
-            .simd_lanes(4..16)
-            .dynamic_simd_lanes(4..16)
+            .simd_lanes(2..16)
+            .dynamic_simd_lanes(2..16)
             .includes_scalars(false)
             .build(),
     );