Support big- and little-endian lane order with bitcast (#5196)
Add a MemFlags operand to the bitcast instruction, where only the `big` and `little` flags are accepted. These define the lane order to be used when casting between types of different lane counts. Update all users to pass an appropriate MemFlags argument. Implement lane swaps where necessary in the s390x back-end. This is the final part necessary to fix https://github.com/bytecodealliance/wasmtime/issues/4566.
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@@ -16,7 +16,7 @@ block0(v0: i32x4, v1: i32x4):
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function %mask_casted(i64x2, i64x2, i32x4) -> i64x2 {
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block0(v0: i64x2, v1: i64x2, v2: i32x4):
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v3 = bitcast.i64x2 v2
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v3 = bitcast.i64x2 little v2
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v4 = bitselect v3, v0, v1
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return v4
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}
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@@ -26,10 +26,10 @@ block0:
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function %shuffle_i32x4_in_same_place() -> i32x4 {
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block0:
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v1 = vconst.i32x4 [0 1 2 3]
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v2 = bitcast.i8x16 v1 ; we have to cast because shuffle is type-limited to Tx16
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v2 = bitcast.i8x16 little v1 ; we have to cast because shuffle is type-limited to Tx16
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; keep each lane in place from the first vector
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v3 = shuffle v2, v2, [0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15]
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v4 = bitcast.i32x4 v3
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v4 = bitcast.i32x4 little v3
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return v4
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}
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; run: %shuffle_in_same_place() == [0 1 2 3]
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@@ -37,10 +37,10 @@ block0:
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function %shuffle_i32x4_to_all_true() -> i32x4 {
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block0:
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v1 = vconst.i32x4 [-1 0 -1 0]
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v2 = bitcast.i8x16 v1 ; we have to cast because shuffle is type-limited to Tx16
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v2 = bitcast.i8x16 little v1 ; we have to cast because shuffle is type-limited to Tx16
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; pair up the true values to make the entire vector true
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v3 = shuffle v2, v2, [0 1 2 3 0 1 2 3 8 9 10 11 8 9 10 11]
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v4 = bitcast.i32x4 v3 ; TODO store.i32x4 is unavailable; see https://github.com/bytecodealliance/wasmtime/issues/2237
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v4 = bitcast.i32x4 little v3 ; TODO store.i32x4 is unavailable; see https://github.com/bytecodealliance/wasmtime/issues/2237
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return v4
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}
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; run: %shuffle_i32x4_to_all_true() == [0xffffffff 0xffffffff 0xffffffff 0xffffffff]
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