From 3e1e2b6e5e24465895cbede623fe74c20d196595 Mon Sep 17 00:00:00 2001 From: Jakob Stoklund Olesen Date: Wed, 14 Jun 2017 15:36:25 -0700 Subject: [PATCH] Add RISC-V encodings for copy instructions. --- cranelift/filetests/isa/riscv/binary32.cton | 4 ++++ lib/cretonne/meta/isa/riscv/encodings.py | 7 ++++++- lib/cretonne/meta/isa/riscv/recipes.py | 3 +++ lib/cretonne/src/isa/riscv/binemit.rs | 12 ++++++++++++ 4 files changed, 25 insertions(+), 1 deletion(-) diff --git a/cranelift/filetests/isa/riscv/binary32.cton b/cranelift/filetests/isa/riscv/binary32.cton index 052342f233..923b6eb537 100644 --- a/cranelift/filetests/isa/riscv/binary32.cton +++ b/cranelift/filetests/isa/riscv/binary32.cton @@ -77,6 +77,10 @@ ebb0(v9999: i32): [-,%x7] v140 = iconst.i32 0x12345000 ; bin: 123453b7 [-,%x16] v141 = iconst.i32 0xffffffff_fedcb000 ; bin: fedcb837 + ; Copies alias to iadd_imm. + [-,%x7] v150 = copy v1 ; bin: 00050393 + [-,%x16] v151 = copy v2 ; bin: 000a8813 + ; Control Transfer Instructions ; jal %x1, fn0 diff --git a/lib/cretonne/meta/isa/riscv/encodings.py b/lib/cretonne/meta/isa/riscv/encodings.py index 2b59964007..5d3c121a14 100644 --- a/lib/cretonne/meta/isa/riscv/encodings.py +++ b/lib/cretonne/meta/isa/riscv/encodings.py @@ -7,7 +7,7 @@ from base.immediates import intcc from .defs import RV32, RV64 from .recipes import OPIMM, OPIMM32, OP, OP32, LUI, BRANCH, JALR, JAL from .recipes import LOAD, STORE -from .recipes import R, Rshamt, Ricmp, I, Iicmp, Iret +from .recipes import R, Rshamt, Ricmp, I, Iicmp, Iret, Icopy from .recipes import U, UJ, UJcall, SB, SBzero, GPsp, GPfi from .settings import use_m from cdsl.ast import Var @@ -123,3 +123,8 @@ RV64.enc(base.spill.i64, GPsp, STORE(0b011)) RV32.enc(base.fill.i32, GPfi, LOAD(0b010)) RV64.enc(base.fill.i32, GPfi, LOAD(0b010)) RV64.enc(base.fill.i64, GPfi, LOAD(0b011)) + +# Register copies. +RV32.enc(base.copy.i32, Icopy, OPIMM(0b000)) +RV64.enc(base.copy.i64, Icopy, OPIMM(0b000)) +RV64.enc(base.copy.i32, Icopy, OPIMM32(0b000)) diff --git a/lib/cretonne/meta/isa/riscv/recipes.py b/lib/cretonne/meta/isa/riscv/recipes.py index 1a7e98d0fe..8a6be46c5f 100644 --- a/lib/cretonne/meta/isa/riscv/recipes.py +++ b/lib/cretonne/meta/isa/riscv/recipes.py @@ -113,6 +113,9 @@ Iicmp = EncRecipe( # The variable return values are not encoded. Iret = EncRecipe('Iret', MultiAry, size=4, ins=(), outs=()) +# Copy of a GPR is implemented as addi x, 0. +Icopy = EncRecipe('Icopy', Unary, size=4, ins=GPR, outs=GPR) + # U-type instructions have a 20-bit immediate that targets bits 12-31. U = EncRecipe( 'U', UnaryImm, size=4, ins=(), outs=GPR, diff --git a/lib/cretonne/src/isa/riscv/binemit.rs b/lib/cretonne/src/isa/riscv/binemit.rs index e025b3f9d4..0beaf51a8d 100644 --- a/lib/cretonne/src/isa/riscv/binemit.rs +++ b/lib/cretonne/src/isa/riscv/binemit.rs @@ -182,6 +182,18 @@ fn recipe_iret(func: &Function, inst: Inst, sink: &mut CS sink); } +fn recipe_icopy(func: &Function, inst: Inst, sink: &mut CS) { + if let InstructionData::Unary { arg, .. } = func.dfg[inst] { + put_i(func.encodings[inst].bits(), + func.locations[arg].unwrap_reg(), + 0, + func.locations[func.dfg.first_result(inst)].unwrap_reg(), + sink); + } else { + panic!("Expected Unary format: {:?}", func.dfg[inst]); + } +} + /// U-type instructions. /// /// 31 11 6