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Fix rustfmt errors.

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This commit is contained in:
Dan Gohman
2018-08-14 22:03:07 -07:00
parent e2badb0ad6
commit 3d89a8645b
14 changed files with 66 additions and 46 deletions
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4
lib/codegen/src/constant_hash.rs
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@@ -1,7 +1,7 @@
//! Runtime support for precomputed constant hash tables.
//!
//! The `lib/codegen/meta-python/constant_hash.py` Python module can generate constant hash tables using
//! open addressing and quadratic probing. The hash tables are arrays that are guaranteed to:
//! The `lib/codegen/meta-python/constant_hash.py` Python module can generate constant hash tables
//! using open addressing and quadratic probing. The hash tables are arrays that are guaranteed to:
//!
//! - Have a power-of-two size.
//! - Contain at least one empty slot.

2
lib/codegen/src/isa/mod.rs
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@@ -23,8 +23,8 @@
//! # extern crate cranelift_codegen;
//! # #[macro_use] extern crate target_lexicon;
//! # fn main() {
//! use cranelift_codegen::settings::{self, Configurable};
//! use cranelift_codegen::isa;
//! use cranelift_codegen::settings::{self, Configurable};
//! use std::str::FromStr;
//! use target_lexicon::Triple;
//!

4
lib/codegen/src/isa/x86/abi.rs
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@@ -433,8 +433,8 @@ fn insert_common_prologue(
if let Some(stack_limit_arg) = pos.func.special_param(ArgumentPurpose::StackLimit) {
// Total stack size is the size of all stack area used by the function, including
// pushed CSRs, frame pointer.
// Also, the size of a return address, implicitly pushed by a x86 `call` instruction, also
// should be accounted for.
// Also, the size of a return address, implicitly pushed by a x86 `call` instruction,
// also should be accounted for.
// TODO: Check if the function body actually contains a `call` instruction.
let word_size = isa.pointer_bytes();
let total_stack_size = (csrs.iter(GPR).len() + 1 + 1) as i64 * word_size as i64;

32
lib/codegen/src/isa/x86/enc_tables.rs
View File

@@ -367,23 +367,27 @@ fn expand_fcvt_to_sint(
let output_bits = ty.lane_bits();
let flimit = match xty {
ir::types::F32 =>
// An f32 can represent `i16::min_value() - 1` exactly with precision to spare, so
// there are values less than -2^(N-1) that convert correctly to INT_MIN.
// An f32 can represent `i16::min_value() - 1` exactly with precision to spare, so
// there are values less than -2^(N-1) that convert correctly to INT_MIN.
{
pos.ins().f32const(if output_bits < 32 {
overflow_cc = FloatCC::LessThanOrEqual;
Ieee32::fcvt_to_sint_negative_overflow(output_bits)
} else {
Ieee32::pow2(output_bits - 1).neg()
}),
})
}
ir::types::F64 =>
// An f64 can represent `i32::min_value() - 1` exactly with precision to spare, so
// there are values less than -2^(N-1) that convert correctly to INT_MIN.
// An f64 can represent `i32::min_value() - 1` exactly with precision to spare, so
// there are values less than -2^(N-1) that convert correctly to INT_MIN.
{
pos.ins().f64const(if output_bits < 64 {
overflow_cc = FloatCC::LessThanOrEqual;
Ieee64::fcvt_to_sint_negative_overflow(output_bits)
} else {
Ieee64::pow2(output_bits - 1).neg()
}),
})
}
_ => panic!("Can't convert {}", xty),
};
let overflow = pos.ins().fcmp(overflow_cc, x, flimit);
@@ -464,23 +468,27 @@ fn expand_fcvt_to_sint_sat(
let output_bits = ty.lane_bits();
let flimit = match xty {
ir::types::F32 =>
// An f32 can represent `i16::min_value() - 1` exactly with precision to spare, so
// there are values less than -2^(N-1) that convert correctly to INT_MIN.
// An f32 can represent `i16::min_value() - 1` exactly with precision to spare, so
// there are values less than -2^(N-1) that convert correctly to INT_MIN.
{
pos.ins().f32const(if output_bits < 32 {
overflow_cc = FloatCC::LessThanOrEqual;
Ieee32::fcvt_to_sint_negative_overflow(output_bits)
} else {
Ieee32::pow2(output_bits - 1).neg()
}),
})
}
ir::types::F64 =>
// An f64 can represent `i32::min_value() - 1` exactly with precision to spare, so
// there are values less than -2^(N-1) that convert correctly to INT_MIN.
// An f64 can represent `i32::min_value() - 1` exactly with precision to spare, so
// there are values less than -2^(N-1) that convert correctly to INT_MIN.
{
pos.ins().f64const(if output_bits < 64 {
overflow_cc = FloatCC::LessThanOrEqual;
Ieee64::fcvt_to_sint_negative_overflow(output_bits)
} else {
Ieee64::pow2(output_bits - 1).neg()
}),
})
}
_ => panic!("Can't convert {}", xty),
};

4
lib/codegen/src/legalizer/heap.rs
View File

@@ -65,8 +65,8 @@ fn dynamic_addr(
.ins()
.icmp(IntCC::UnsignedGreaterThanOrEqual, offset, bound);
} else if access_size <= min_size {
// We know that bound >= min_size, so here we can compare `offset > bound - access_size` without
// wrapping.
// We know that bound >= min_size, so here we can compare `offset > bound - access_size`
// without wrapping.
let adj_bound = pos.ins().iadd_imm(bound, -access_size);
oob = pos
.ins()

4
lib/codegen/src/regalloc/coalescing.rs
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@@ -876,8 +876,8 @@ struct VirtualCopies {
// Filter for the currently active node iterator.
//
// An ebb => (set_id, num) entry means that branches to `ebb` are active in `set_id` with branch
// argument number `num`.
// An ebb => (set_id, num) entry means that branches to `ebb` are active in `set_id` with
// branch argument number `num`.
filter: FxHashMap<Ebb, (u8, usize)>,
}

4
lib/codegen/src/regalloc/liveness.rs
View File

@@ -97,8 +97,8 @@
//!
//! Cranelift uses a very similar data structures and algorithms to LLVM, with the important
//! difference that live ranges are computed per SSA value instead of per virtual register, and the
//! uses in Cranelift IR refers to SSA values instead of virtual registers. This means that Cranelift
//! can skip the last step of reconstructing SSA form for the virtual register uses.
//! uses in Cranelift IR refers to SSA values instead of virtual registers. This means that
//! Cranelift can skip the last step of reconstructing SSA form for the virtual register uses.
//!
//! ## Fast Liveness Checking for SSA-Form Programs
//!