diff --git a/cranelift/fuzzgen/src/function_generator.rs b/cranelift/fuzzgen/src/function_generator.rs index 5e8fcefc2a..88e0f62efc 100644 --- a/cranelift/fuzzgen/src/function_generator.rs +++ b/cranelift/fuzzgen/src/function_generator.rs @@ -277,6 +277,72 @@ const OPCODE_SIGNATURES: &'static [( // aarch64: https://github.com/bytecodealliance/wasmtime/issues/4864 #[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))] (Opcode::Sdiv, &[I128, I128], &[I128], insert_opcode), + // Ineg + (Opcode::Ineg, &[I8, I8], &[I8], insert_opcode), + (Opcode::Ineg, &[I16, I16], &[I16], insert_opcode), + (Opcode::Ineg, &[I32, I32], &[I32], insert_opcode), + (Opcode::Ineg, &[I64, I64], &[I64], insert_opcode), + // ineg.i128 not implemented in some backends: + // x64: https://github.com/bytecodealliance/wasmtime/issues/5105 + // aarch64: https://github.com/bytecodealliance/wasmtime/issues/5108 + #[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))] + (Opcode::Ineg, &[I128, I128], &[I128], insert_opcode), + // Imin + // imin not implemented in some backends: + // x64: https://github.com/bytecodealliance/wasmtime/issues/3370 + // aarch64: https://github.com/bytecodealliance/wasmtime/issues/4313 + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Imin, &[I8, I8], &[I8], insert_opcode), + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Imin, &[I16, I16], &[I16], insert_opcode), + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Imin, &[I32, I32], &[I32], insert_opcode), + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Imin, &[I64, I64], &[I64], insert_opcode), + #[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))] + (Opcode::Imin, &[I128, I128], &[I128], insert_opcode), + // Umin + // umin not implemented in some backends: + // x64: https://github.com/bytecodealliance/wasmtime/issues/3370 + // aarch64: https://github.com/bytecodealliance/wasmtime/issues/4313 + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Umin, &[I8, I8], &[I8], insert_opcode), + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Umin, &[I16, I16], &[I16], insert_opcode), + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Umin, &[I32, I32], &[I32], insert_opcode), + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Umin, &[I64, I64], &[I64], insert_opcode), + #[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))] + (Opcode::Umin, &[I128, I128], &[I128], insert_opcode), + // Imax + // imax not implemented in some backends: + // x64: https://github.com/bytecodealliance/wasmtime/issues/3370 + // aarch64: https://github.com/bytecodealliance/wasmtime/issues/4313 + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Imax, &[I8, I8], &[I8], insert_opcode), + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Imax, &[I16, I16], &[I16], insert_opcode), + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Imax, &[I32, I32], &[I32], insert_opcode), + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Imax, &[I64, I64], &[I64], insert_opcode), + #[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))] + (Opcode::Imax, &[I128, I128], &[I128], insert_opcode), + // Umax + // umax not implemented in some backends: + // x64: https://github.com/bytecodealliance/wasmtime/issues/3370 + // aarch64: https://github.com/bytecodealliance/wasmtime/issues/4313 + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Umax, &[I8, I8], &[I8], insert_opcode), + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Umax, &[I16, I16], &[I16], insert_opcode), + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Umax, &[I32, I32], &[I32], insert_opcode), + #[cfg(not(target_arch = "aarch64"))] + (Opcode::Umax, &[I64, I64], &[I64], insert_opcode), + #[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))] + (Opcode::Umax, &[I128, I128], &[I128], insert_opcode), // Rotr (Opcode::Rotr, &[I8, I8], &[I8], insert_opcode), (Opcode::Rotr, &[I8, I16], &[I8], insert_opcode), @@ -546,6 +612,96 @@ const OPCODE_SIGNATURES: &'static [( (Opcode::BxorNot, &[F32, F32], &[F32], insert_opcode), #[cfg(not(any(target_arch = "x86_64", target_arch = "aarch64")))] (Opcode::BxorNot, &[F64, F64], &[F64], insert_opcode), + // Bitrev + (Opcode::Bitrev, &[I8], &[I8], insert_opcode), + (Opcode::Bitrev, &[I16], &[I16], insert_opcode), + (Opcode::Bitrev, &[I32], &[I32], insert_opcode), + (Opcode::Bitrev, &[I64], &[I64], insert_opcode), + (Opcode::Bitrev, &[I128], &[I128], insert_opcode), + // Clz + (Opcode::Clz, &[I8], &[I8], insert_opcode), + (Opcode::Clz, &[I16], &[I16], insert_opcode), + (Opcode::Clz, &[I32], &[I32], insert_opcode), + (Opcode::Clz, &[I64], &[I64], insert_opcode), + (Opcode::Clz, &[I128], &[I128], insert_opcode), + // Cls + // cls not implemented in some backends: + // x64: https://github.com/bytecodealliance/wasmtime/issues/5107 + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Cls, &[I8], &[I8], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Cls, &[I16], &[I16], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Cls, &[I32], &[I32], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Cls, &[I64], &[I64], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Cls, &[I128], &[I128], insert_opcode), + // Ctz + (Opcode::Ctz, &[I8], &[I8], insert_opcode), + (Opcode::Ctz, &[I16], &[I16], insert_opcode), + (Opcode::Ctz, &[I32], &[I32], insert_opcode), + (Opcode::Ctz, &[I64], &[I64], insert_opcode), + (Opcode::Ctz, &[I128], &[I128], insert_opcode), + // Popcnt + (Opcode::Popcnt, &[I8], &[I8], insert_opcode), + (Opcode::Popcnt, &[I16], &[I16], insert_opcode), + (Opcode::Popcnt, &[I32], &[I32], insert_opcode), + (Opcode::Popcnt, &[I64], &[I64], insert_opcode), + (Opcode::Popcnt, &[I128], &[I128], insert_opcode), + // Bmask + // bmask not implemented in some backends: + // x64: https://github.com/bytecodealliance/wasmtime/issues/5106 + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I8], &[I8], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I16], &[I8], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I32], &[I8], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I64], &[I8], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I128], &[I8], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I8], &[I16], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I16], &[I16], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I32], &[I16], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I64], &[I16], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I128], &[I16], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I8], &[I32], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I16], &[I32], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I32], &[I32], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I64], &[I32], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I128], &[I32], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I8], &[I64], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I16], &[I64], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I32], &[I64], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I64], &[I64], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I128], &[I64], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I8], &[I128], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I16], &[I128], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I32], &[I128], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I64], &[I128], insert_opcode), + #[cfg(not(target_arch = "x86_64"))] + (Opcode::Bmask, &[I128], &[I128], insert_opcode), // Fadd (Opcode::Fadd, &[F32, F32], &[F32], insert_opcode), (Opcode::Fadd, &[F64, F64], &[F64], insert_opcode),