Cranelift: refactoring of unwind info (#2289)
* factor common code * move fde/unwind emit to more abstract level * code_len -> function_size * speedup block scanning * better function_size calciulation * Rename UnwindCode enums
This commit is contained in:
Yury Delendik
@@ -1,13 +1,11 @@
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//! Unwind information for System V ABI (x86-64).
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use crate::ir::{Function, Inst, InstructionData, Opcode, Value};
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use crate::ir::Function;
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use crate::isa::{
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unwind::systemv::{CallFrameInstruction, RegisterMappingError, UnwindInfo},
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x86::registers::RU,
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unwind::systemv::{RegisterMappingError, UnwindInfo},
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CallConv, RegUnit, TargetIsa,
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};
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use crate::result::{CodegenError, CodegenResult};
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use alloc::vec::Vec;
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use crate::result::CodegenResult;
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use gimli::{write::CommonInformationEntry, Encoding, Format, Register, X86_64};
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/// Creates a new x86-64 common information entry (CIE).
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@@ -94,191 +92,6 @@ pub fn map_reg(isa: &dyn TargetIsa, reg: RegUnit) -> Result<Register, RegisterMa
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}
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}
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struct InstructionBuilder<'a> {
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func: &'a Function,
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isa: &'a dyn TargetIsa,
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cfa_offset: i32,
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frame_register: Option<RegUnit>,
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instructions: Vec<(u32, CallFrameInstruction)>,
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stack_size: Option<i32>,
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epilogue_pop_offsets: Vec<u32>,
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}
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impl<'a> InstructionBuilder<'a> {
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fn new(func: &'a Function, isa: &'a dyn TargetIsa, frame_register: Option<RegUnit>) -> Self {
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Self {
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func,
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isa,
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cfa_offset: 8, // CFA offset starts at 8 to account to return address on stack
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frame_register,
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instructions: Vec::new(),
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stack_size: None,
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epilogue_pop_offsets: Vec::new(),
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}
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}
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fn push_reg(&mut self, offset: u32, arg: Value) -> Result<(), RegisterMappingError> {
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self.cfa_offset += 8;
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let reg = self.func.locations[arg].unwrap_reg();
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// Update the CFA if this is the save of the frame pointer register or if a frame pointer isn't being used
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// When using a frame pointer, we only need to update the CFA to account for the push of the frame pointer itself
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if match self.frame_register {
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Some(fp) => reg == fp,
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None => true,
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} {
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self.instructions
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.push((offset, CallFrameInstruction::CfaOffset(self.cfa_offset)));
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}
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// Pushes in the prologue are register saves, so record an offset of the save
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self.instructions.push((
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offset,
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CallFrameInstruction::Offset(map_reg(self.isa, reg)?.0, -self.cfa_offset),
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));
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Ok(())
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}
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fn adjust_sp_down(&mut self, offset: u32) {
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// Don't adjust the CFA if we're using a frame pointer
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if self.frame_register.is_some() {
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return;
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}
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self.cfa_offset += self
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.stack_size
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.expect("expected a previous stack size instruction");
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self.instructions
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.push((offset, CallFrameInstruction::CfaOffset(self.cfa_offset)));
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}
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fn adjust_sp_down_imm(&mut self, offset: u32, imm: i64) {
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assert!(imm <= core::u32::MAX as i64);
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// Don't adjust the CFA if we're using a frame pointer
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if self.frame_register.is_some() {
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return;
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}
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self.cfa_offset += imm as i32;
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self.instructions
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.push((offset, CallFrameInstruction::CfaOffset(self.cfa_offset)));
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}
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fn adjust_sp_up_imm(&mut self, offset: u32, imm: i64) {
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assert!(imm <= core::u32::MAX as i64);
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// Don't adjust the CFA if we're using a frame pointer
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if self.frame_register.is_some() {
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return;
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}
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self.cfa_offset -= imm as i32;
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self.instructions
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.push((offset, CallFrameInstruction::CfaOffset(self.cfa_offset)));
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}
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fn move_reg(
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&mut self,
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offset: u32,
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src: RegUnit,
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dst: RegUnit,
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) -> Result<(), RegisterMappingError> {
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if let Some(fp) = self.frame_register {
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// Check for change in CFA register (RSP is always the starting CFA)
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if src == (RU::rsp as RegUnit) && dst == fp {
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self.instructions.push((
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offset,
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CallFrameInstruction::CfaRegister(map_reg(self.isa, dst)?.0),
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));
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}
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}
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Ok(())
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}
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fn prologue_imm_const(&mut self, imm: i64) {
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assert!(imm <= core::u32::MAX as i64);
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assert!(self.stack_size.is_none());
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// This instruction should only appear in a prologue to pass an
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// argument of the stack size to a stack check function.
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// Record the stack size so we know what it is when we encounter the adjustment
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// instruction (which will adjust via the register assigned to this instruction).
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self.stack_size = Some(imm as i32);
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}
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fn ret(&mut self, inst: Inst) -> Result<(), RegisterMappingError> {
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let args = self.func.dfg.inst_args(inst);
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for (i, arg) in args.iter().rev().enumerate() {
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// Only walk back the args for the pop instructions encountered
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if i >= self.epilogue_pop_offsets.len() {
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break;
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}
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self.cfa_offset -= 8;
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let reg = self.func.locations[*arg].unwrap_reg();
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// Update the CFA if this is the restore of the frame pointer register or if a frame pointer isn't being used
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match self.frame_register {
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Some(fp) => {
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if reg == fp {
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self.instructions.push((
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self.epilogue_pop_offsets[i],
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CallFrameInstruction::Cfa(
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map_reg(self.isa, RU::rsp as RegUnit)?.0,
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self.cfa_offset,
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),
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));
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}
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}
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None => {
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self.instructions.push((
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self.epilogue_pop_offsets[i],
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CallFrameInstruction::CfaOffset(self.cfa_offset),
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));
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// Pops in the epilogue are register restores, so record a "same value" for the register
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// This isn't necessary when using a frame pointer as the CFA doesn't change for CSR restores
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self.instructions.push((
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self.epilogue_pop_offsets[i],
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CallFrameInstruction::SameValue(map_reg(self.isa, reg)?.0),
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));
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}
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};
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}
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self.epilogue_pop_offsets.clear();
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Ok(())
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}
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fn insert_pop_offset(&mut self, offset: u32) {
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self.epilogue_pop_offsets.push(offset);
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}
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fn remember_state(&mut self, offset: u32) {
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self.instructions
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.push((offset, CallFrameInstruction::RememberState));
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}
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fn restore_state(&mut self, offset: u32) {
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self.instructions
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.push((offset, CallFrameInstruction::RestoreState));
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}
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fn is_prologue_end(&self, inst: Inst) -> bool {
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self.func.prologue_end == Some(inst)
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}
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fn is_epilogue_start(&self, inst: Inst) -> bool {
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self.func.epilogues_start.contains(&inst)
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}
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}
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pub(crate) fn create_unwind_info(
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func: &Function,
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isa: &dyn TargetIsa,
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@@ -293,93 +106,32 @@ pub(crate) fn create_unwind_info(
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if func.prologue_end.is_none() || isa.name() != "x86" || isa.pointer_bits() != 64 {
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return Ok(None);
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}
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const WORD_SIZE: u8 = 8; // bytes
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let mut builder = InstructionBuilder::new(func, isa, frame_register);
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let mut in_prologue = true;
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let mut in_epilogue = false;
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let mut len = 0;
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let unwind = match super::create_unwind_info(func, isa, frame_register)? {
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Some(u) => u,
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None => {
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return Ok(None);
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}
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};
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let mut blocks = func.layout.blocks().collect::<Vec<_>>();
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blocks.sort_by_key(|b| func.offsets[*b]);
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for (i, block) in blocks.iter().enumerate() {
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for (offset, inst, size) in func.inst_offsets(*block, &isa.encoding_info()) {
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let offset = offset + size;
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assert!(len <= offset);
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len = offset;
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let is_last_block = i == blocks.len() - 1;
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if in_prologue {
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// Check for prologue end (inclusive)
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in_prologue = !builder.is_prologue_end(inst);
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} else if !in_epilogue && builder.is_epilogue_start(inst) {
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// Now in an epilogue, emit a remember state instruction if not last block
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in_epilogue = true;
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if !is_last_block {
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builder.remember_state(offset);
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}
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} else if !in_epilogue {
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// Ignore normal instructions
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continue;
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}
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match builder.func.dfg[inst] {
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InstructionData::Unary { opcode, arg } => match opcode {
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Opcode::X86Push => {
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builder
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.push_reg(offset, arg)
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.map_err(CodegenError::RegisterMappingError)?;
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}
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Opcode::AdjustSpDown => {
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builder.adjust_sp_down(offset);
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}
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_ => {}
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},
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InstructionData::CopySpecial { src, dst, .. } => {
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builder
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.move_reg(offset, src, dst)
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.map_err(CodegenError::RegisterMappingError)?;
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}
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InstructionData::NullAry { opcode } => match opcode {
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Opcode::X86Pop => {
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builder.insert_pop_offset(offset);
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}
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_ => {}
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},
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InstructionData::UnaryImm { opcode, imm } => match opcode {
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Opcode::Iconst => {
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builder.prologue_imm_const(imm.into());
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}
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Opcode::AdjustSpDownImm => {
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builder.adjust_sp_down_imm(offset, imm.into());
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}
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Opcode::AdjustSpUpImm => {
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builder.adjust_sp_up_imm(offset, imm.into());
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}
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_ => {}
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},
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InstructionData::MultiAry { opcode, .. } => match opcode {
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Opcode::Return => {
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builder
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.ret(inst)
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.map_err(CodegenError::RegisterMappingError)?;
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if !is_last_block {
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builder.restore_state(offset);
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}
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in_epilogue = false;
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}
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_ => {}
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},
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_ => {}
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};
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struct RegisterMapper<'a, 'b>(&'a (dyn TargetIsa + 'b));
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impl<'a, 'b> crate::isa::unwind::systemv::RegisterMapper for RegisterMapper<'a, 'b> {
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fn map(&self, reg: RegUnit) -> Result<u16, RegisterMappingError> {
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Ok(map_reg(self.0, reg)?.0)
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}
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fn rsp(&self) -> u16 {
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X86_64::RSP.0
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}
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}
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let map = RegisterMapper(isa);
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Ok(Some(UnwindInfo::new(builder.instructions, len)))
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Ok(Some(UnwindInfo::build(
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unwind,
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WORD_SIZE,
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frame_register,
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&map,
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)?))
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}
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#[cfg(test)]
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@@ -460,7 +212,7 @@ mod tests {
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_ => panic!("expected unwind information"),
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};
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assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(4321), length: 16, lsda: None, instructions: [(2, CfaOffset(16)), (2, Offset(Register(6), -16)), (5, CfaRegister(Register(6))), (12, RememberState), (12, Cfa(Register(7), 8)), (13, RestoreState), (15, Cfa(Register(7), 0))] }");
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assert_eq!(format!("{:?}", fde), "FrameDescriptionEntry { address: Constant(4321), length: 16, lsda: None, instructions: [(2, CfaOffset(16)), (2, Offset(Register(6), -16)), (5, CfaRegister(Register(6))), (12, RememberState), (12, Cfa(Register(7), 8)), (13, RestoreState), (15, Cfa(Register(7), 8))] }");
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}
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fn create_multi_return_function(call_conv: CallConv) -> Function {
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