Implement value affinities for register allocation.

An SSA value is usually biased towards a specific register class or a
stack slot, depending on the constraints of the instructions using it.

Represent this bias as an Affinity enum, and implement a merging
algorithm for updating an affinity to satisfy a new constraint.

Affinities will be computed as part of the liveness analysis. This is
not implemented yet.

lib/cretonne/src/isa/constraints.rs

@@ -21,6 +21,7 @@ pub struct OperandConstraint {
 }
 
 /// The different kinds of operand constraints.
+#[derive(Clone, Copy, PartialEq, Eq)]
 pub enum ConstraintKind {
     /// This operand or result must be a register from the given register class.
     Reg,

lib/cretonne/src/isa/mod.rs

@@ -41,8 +41,8 @@
 //! concurrent function compilations.
 
 pub use isa::encoding::Encoding;
-pub use isa::registers::{RegInfo, RegUnit, RegClass};
-pub use isa::constraints::RecipeConstraints;
+pub use isa::registers::{RegInfo, RegUnit, RegClass, RegClassIndex};
+pub use isa::constraints::{RecipeConstraints, OperandConstraint, ConstraintKind};
 
 use settings;
 use ir::{InstructionData, DataFlowGraph};

lib/cretonne/src/isa/registers.rs

@@ -133,6 +133,12 @@ impl RegClassData {
             Some(RegClassIndex(mask.trailing_zeros() as u8))
         }
     }
+
+    /// Returns true if `other` is a subclass of this register class.
+    /// A register class is considerd to be a subclass of itself.
+    pub fn has_subclass<RCI: Into<RegClassIndex>>(&self, other: RCI) -> bool {
+        self.subclasses & (1 << other.into().0) != 0
+    }
 }
 
 /// A small reference to a register class.