committed by
Jakob Stoklund Olesen
parent
d8e2cb2b42
commit
3bcfb103b9
@@ -10,7 +10,7 @@ from cdsl.typevar import TypeVar
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from cdsl.instructions import Instruction, InstructionGroup
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from base.types import f32, f64, b1
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from base.immediates import imm64, uimm8, ieee32, ieee64, offset32, uoffset32
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from base.immediates import intcc, floatcc, memflags, regunit
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from base.immediates import boolean, intcc, floatcc, memflags, regunit
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from base import entities
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from cdsl.ti import WiderOrEq
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import base.formats # noqa
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@@ -18,6 +18,8 @@ import base.formats # noqa
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GROUP = InstructionGroup("base", "Shared base instruction set")
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Int = TypeVar('Int', 'A scalar or vector integer type', ints=True, simd=True)
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Bool = TypeVar('Bool', 'A scalar or vector boolean type',
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bools=True, simd=True)
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iB = TypeVar('iB', 'A scalar integer type', ints=True)
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iAddr = TypeVar('iAddr', 'An integer address type', ints=(32, 64))
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Testable = TypeVar(
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@@ -417,6 +419,17 @@ f64const = Instruction(
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""",
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ins=N, outs=a)
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N = Operand('N', boolean)
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a = Operand('a', Bool, doc='A constant boolean scalar or vector value')
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bconst = Instruction(
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'bconst', r"""
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Boolean constant.
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Create a scalar boolean SSA value with an immediate constant value, or
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a boolean vector where all the lanes have the same value.
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""",
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ins=N, outs=a)
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#
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# Generics.
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#
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